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Patent applications and USPTO patent grants for Wadhwa; Jatinder K..The latest application filed is for "global bit line restore timing scheme and circuit".
Patent | Date |
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Global bit line restore timing scheme and circuit Grant 7,272,030 - Chan , et al. September 18, 2 | 2007-09-18 |
Global Bit Line Restore Timing Scheme and Circuit App 20070058421 - Chan; Yuen H. ;   et al. | 2007-03-15 |
Global bit line restore timing scheme and circuit Grant 7,170,774 - Chan , et al. January 30, 2 | 2007-01-30 |
Global bit line restore timing scheme and circuit App 20060176730 - Chan; Yuen H. ;   et al. | 2006-08-10 |
High performance CMOS NOR predecode circuit App 20060176757 - Chan; Yuen H. ;   et al. | 2006-08-10 |
Output driver with pulse to static converter Grant 7,084,673 - Chan , et al. August 1, 2 | 2006-08-01 |
Output driver with pulse to static converter App 20050253639 - Chan, Yuen H. ;   et al. | 2005-11-17 |
Programmable Sense Amplifier Timing Generator App 20050254317 - Chan, Yuen H. ;   et al. | 2005-11-17 |
Programmable sense amplifier timing generator Grant 6,958,943 - Chan , et al. October 25, 2 | 2005-10-25 |
High performance programmable array local clock generator Grant 6,850,460 - Chan , et al. February 1, 2 | 2005-02-01 |
High performance dual-stage sense amplifier circuit Grant 6,788,112 - Chan , et al. September 7, 2 | 2004-09-07 |
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