loadpatents
name:-0.010133981704712
name:-0.012876987457275
name:-0.0040318965911865
Vytla; Rajeev-Krishna Patent Filings

Vytla; Rajeev-Krishna

Patent Applications and Registrations

Patent applications and USPTO patent grants for Vytla; Rajeev-Krishna.The latest application filed is for "active gate bias driver".

Company Profile
3.10.13
  • Vytla; Rajeev-Krishna - El Segundo CA
  • Vytla; Rajeev Krishna - Los Angeles CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Active gate bias driver
Grant 10,680,598 - Vytla , et al.
2020-06-09
Active Gate Bias Driver
App 20190260368 - Vytla; Rajeev-Krishna ;   et al.
2019-08-22
Active gate bias driver
Grant 10,224,918 - Vytla , et al.
2019-03-05
Bipolar semiconductor device with multi-trench enhancement regions
Grant 10,164,078 - Udrea , et al. Dec
2018-12-25
Semiconductor device having a superjunction structure
Grant 10,115,812 - Udrea , et al. October 30, 2
2018-10-30
Active Gate Bias Driver
App 20180159520 - Vytla; Rajeev-Krishna ;   et al.
2018-06-07
Edge termination structure having a termination charge region below a recessed field oxide region
Grant 9,899,477 - Turner , et al. February 20, 2
2018-02-20
Bipolar semiconductor device with sub-cathode enhancement regions
Grant 9,871,128 - Udrea , et al. January 16, 2
2018-01-16
Semiconductor Device Having a Superjunction Structure
App 20180012983 - Udrea; Florin ;   et al.
2018-01-11
Bipolar semiconductor device having a deep charge-balanced structure
Grant 9,831,330 - Udrea , et al. November 28, 2
2017-11-28
IGBT having a deep superjunction structure
Grant 9,799,725 - Udrea , et al. October 24, 2
2017-10-24
Bipolar Semiconductor Device with Multi-Trench Enhancement Regions
App 20170271488 - Udrea; Florin ;   et al.
2017-09-21
Bipolar Semiconductor Device Having Localized Enhancement Regions
App 20170271445 - Udrea; Florin ;   et al.
2017-09-21
Bipolar Semiconductor Device with Sub-Cathode Enhancement Regions
App 20170271487 - Udrea; Florin ;   et al.
2017-09-21
Bipolar semiconductor device having a charge-balanced inter-trench structure
Grant 9,768,284 - Udrea , et al. September 19, 2
2017-09-19
IGBT having an inter-trench superjunction structure
Grant 9,685,506 - Udrea , et al. June 20, 2
2017-06-20
Bipolar Semiconductor Device Having a Deep Charge-Balanced Structure
App 20160260823 - Udrea; Florin ;   et al.
2016-09-08
IGBT Having an Inter-Trench Superjunction Structure
App 20160260799 - Udrea; Florin ;   et al.
2016-09-08
IGBT Having a Deep Superjunction Structure
App 20160260825 - Udrea; Florin ;   et al.
2016-09-08
Bipolar Semiconductor Device Having a Charge-Balanced Inter-Trench Structure
App 20160260824 - Udrea; Florin ;   et al.
2016-09-08
Edge Termination Structure Having a Termination Charge Region Below a Recessed Field Oxide Region
App 20160020308 - Turner; Russell ;   et al.
2016-01-21
Edge Termination Using Guard Rings Between Recessed Field Oxide Regions
App 20160020279 - Turner; Russell ;   et al.
2016-01-21

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