Patent | Date |
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Lateral diffusion field effect transistor with drain region self-aligned to gate electrode Grant 8,946,013 - Feilchenfeld , et al. February 3, 2 | 2015-02-03 |
Methods of forming and programming an electronically programmable resistor Grant 8,686,478 - Voegeli , et al. April 1, 2 | 2014-04-01 |
Bipolar transistor with raised extrinsic self-aligned base using selective epitaxial growth for BiCMOS integration Grant 8,525,293 - Feilchenfeld , et al. September 3, 2 | 2013-09-03 |
Comparator offset cancellation in a successive approximation analog-to-digital converter Grant 8,493,250 - Bonaccio , et al. July 23, 2 | 2013-07-23 |
Comparator Offset Cancellation In A Successive Approximation Analog-to-digital Converter App 20130057417 - BONACCIO; Anthony R. ;   et al. | 2013-03-07 |
Bipolar Transistor With Raised Extrinsic Self-aligned Base Using Selective Epitaxial Growth For Bicmos Integration App 20120319233 - Feilchenfeld; Natalie B. ;   et al. | 2012-12-20 |
Skewed double differential pair circuit for offset cancellation Grant 8,302,037 - Arsovski , et al. October 30, 2 | 2012-10-30 |
Bipolar transistor with raised extrinsic self-aligned base using selective epitaxial growth for BiCMOS integration Grant 8,236,662 - Feilchenfeld , et al. August 7, 2 | 2012-08-07 |
Lateral Diffusion Field Effect Transistor With Drain Region Self-aligned To Gate Electrode App 20120126319 - Feilchenfeld; Natalie B. ;   et al. | 2012-05-24 |
Methods Of Forming And Programming An Electronically Programmable Resistor App 20120058611 - Voegeli; Benjamin T. ;   et al. | 2012-03-08 |
Electrically programmable resistor Grant 8,125,019 - Voegeli , et al. February 28, 2 | 2012-02-28 |
Lateral diffusion field effect transistor with drain region self-aligned to gate electrode Grant 8,114,750 - Feilchenfeld , et al. February 14, 2 | 2012-02-14 |
Vertical PNP transistor and method of making same Grant 7,972,919 - Gray , et al. July 5, 2 | 2011-07-05 |
Lateral diffusion field effect transistor with a trench field plate Grant 7,956,412 - Feilchenfeld , et al. June 7, 2 | 2011-06-07 |
Bipolar Transistor With Raised Extrinsic Self-aligned Base Using Selective Epitaxial Growth For Bicmos Integration App 20110062548 - Feilchenfeld; Natalie B. ;   et al. | 2011-03-17 |
Bipolar transistor with raised extrinsic self-aligned base using selective epitaxial growth for BiCMOS integration Grant 7,892,910 - Feilchenfeld , et al. February 22, 2 | 2011-02-22 |
Modifying layout of IC based on function of interconnect and related circuit and design structure Grant 7,886,240 - Adkisson , et al. February 8, 2 | 2011-02-08 |
Digital to analog converter having fastpaths Grant 7,868,809 - Iadanza , et al. January 11, 2 | 2011-01-11 |
Lateral diffusion field effect transistor with asymmetric gate dielectric profile Grant 7,829,945 - Adkisson , et al. November 9, 2 | 2010-11-09 |
Vertical P-N junction device and method of forming same Grant 7,732,835 - Voegeli , et al. June 8, 2 | 2010-06-08 |
Design structures and systems involving digital to analog converters Grant 7,710,302 - Iadanza , et al. May 4, 2 | 2010-05-04 |
Skewed Double Differential Pair Circuit for Offset Cancelllation App 20090261882 - Arsovski; Igor ;   et al. | 2009-10-22 |
Lateral Diffusion Field Effect Transistor With Drain Region Self-aligned To Gate Electrode App 20090261426 - Feilchenfeld; Natalie B. ;   et al. | 2009-10-22 |
Modifying Layout Of Ic Based On Function Of Interconnect And Related Circuit And Design Structure App 20090193378 - Adkisson; James W. ;   et al. | 2009-07-30 |
High Speed Resistor-based Digital-to-analog Converter (dac) Architecture App 20090160689 - Iadanza; Joseph A. ;   et al. | 2009-06-25 |
Digital to Analog Converter Having Fastpaths App 20090160691 - Iadanza; Joseph A. ;   et al. | 2009-06-25 |
Lateral Diffusion Field Effect Transistor With A Trench Field Plate App 20090140343 - Feilchenfeld; Natalie B. ;   et al. | 2009-06-04 |
Lateral Diffusion Field Effect Transistor With Asymmetric Gate Dielectric Profile App 20090108347 - Adkisson; James W. ;   et al. | 2009-04-30 |
Method of forming a vertical P-N junction device Grant 7,459,367 - Voegeli , et al. December 2, 2 | 2008-12-02 |
Vertical P-n Junction Device And Method Of Forming Same App 20080258173 - Voegeli; Benjamin T. ;   et al. | 2008-10-23 |
Tailored Bipolar Transistor Doping Profile For Improved Reliability App 20080217742 - Johnson; Jeffrey B. ;   et al. | 2008-09-11 |
Bipolar Transistor With Raised Extrinsic Self-aligned Base Using Selective Epitaxial Growth For Bicmos Integration App 20080203490 - Feilchenfeld; Natalie B. ;   et al. | 2008-08-28 |
Method For Estimating Defects In An Npn Transistor Array App 20080204068 - Dahlstrom; Erik M. ;   et al. | 2008-08-28 |
Bipolar Transistor Using Selective Dielectric Deposition And Methods For Fabrication Thereof App 20080203536 - Furukawa; Toshiharu ;   et al. | 2008-08-28 |
Electrically Programmable Resistor And Methods App 20080093659 - Voegeli; Benjamin T. ;   et al. | 2008-04-24 |
Vertical P-n Junction Device And Method Of Forming Same App 20070023811 - Voegeli; Benjamin T. ;   et al. | 2007-02-01 |
Vertical Pnp Transistor And Method Of Making Same App 20070013031 - Gray; Peter B. ;   et al. | 2007-01-18 |