loadpatents
name:-0.015270948410034
name:-0.018204927444458
name:-0.0030221939086914
Vodrahalli; Nagesh Patent Filings

Vodrahalli; Nagesh

Patent Applications and Registrations

Patent applications and USPTO patent grants for Vodrahalli; Nagesh.The latest application filed is for "memory scaling semiconductor device".

Company Profile
3.18.9
  • Vodrahalli; Nagesh - Los Altos CA
  • Vodrahalli; Nagesh - Phoenix AZ
  • Vodrahalli; Nagesh - Cupertino CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Memory scaling semiconductor device
Grant 11,444,062 - Vodrahalli September 13, 2
2022-09-13
Microwave integrated quantum circuits with cap wafers and their methods of manufacture
Grant 11,121,301 - Marshall , et al. September 14, 2
2021-09-14
Memory scaling semiconductor device
Grant 11,094,674 - Vodrahalli , et al. August 17, 2
2021-08-17
Memory Scaling Semiconductor Device
App 20210249385 - Vodrahalli; Nagesh
2021-08-12
Memory scaling semiconductor device
Grant 11,011,500 - Vodrahalli , et al. May 18, 2
2021-05-18
Memory scaling semiconductor device
Grant 11,004,829 - Vodrahalli May 11, 2
2021-05-11
Substrate materials for quantum processors
Grant 10,985,308 - Vodrahalli April 20, 2
2021-04-20
Memory Scaling Semiconductor Device
App 20210104494 - Vodrahalli; Nagesh ;   et al.
2021-04-08
Memory Scaling Semiconductor Device
App 20210104495 - Vodrahalli; Nagesh ;   et al.
2021-04-08
Memory Scaling Semiconductor Device
App 20210104493 - Vodrahalli; Nagesh
2021-04-08
TSV semiconductor device including two-dimensional shift
Grant 10,811,392 - Hirano , et al. October 20, 2
2020-10-20
Tsv Semiconductor Device Including Two-dimensional Shift
App 20200273844 - Hirano; Toshiki ;   et al.
2020-08-27
Substrate materials for quantum processors
Grant 10,535,809 - Vodrahalli Ja
2020-01-14
Method and apparatus for testing a flip-chip assembly during manufacture
Grant 9,870,959 - Vodrahalli January 16, 2
2018-01-16
Method and apparatus for testing integrated circuit die with a partially completed and validated module
Grant 9,201,097 - Vodrahalli December 1, 2
2015-12-01
Electronic assembly apparatus and associated methods
Grant 9,040,348 - Vodrahalli , et al. May 26, 2
2015-05-26
Process for assembling an integrated circuit package having a substrate vent hole
Grant RE44,629 - Ramalingam , et al. December 10, 2
2013-12-10
Electronic Assembly Apparatus And Associated Methods
App 20130069230 - Vodrahalli; Nagesh
2013-03-21
Electronic Assembly Apparatus And Associated Methods
App 20130071969 - Vodrahalli; Nagesh ;   et al.
2013-03-21
Electronic assembly comprising solderable thermal interface and methods of manufacture
Grant 7,091,063 - Sur , et al. August 15, 2
2006-08-15
High performance thermal interface curing process for organic flip chip packages
Grant 6,982,192 - Vodrahalli , et al. January 3, 2
2006-01-03
Electronic assembly comprising solderable thermal interface
Grant 6,724,078 - Sur , et al. April 20, 2
2004-04-20
Integrated circuit package having a substrate vent hole
Grant 6,490,166 - Ramalingam , et al. December 3, 2
2002-12-03

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