Vo; Huy Thanh

Patent Applications and Registrations

Patent applications and USPTO patent grants for Vo; Huy Thanh.The latest application filed is for "system for testing integrated circuit devices".

Company Profile

0.10.4

Vo; Huy Thanh - Boise ID

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Device and method to reduce wordline RC time constant in semiconductor memory devices Grant 7,570,504 - Vo August 4, 2	2009-08-04
System for testing integrated circuit devices App 20050270058 - Sher, Joseph C. ; et al.	2005-12-08
System for testing integrated circuit devices Grant 6,930,503 - Sher , et al. August 16, 2	2005-08-16
System for testing integrated circuit devices App 20040201399 - Sher, Joseph C. ; et al.	2004-10-14
System for testing integrated circuit devices Grant 6,756,805 - Sher , et al. June 29, 2	2004-06-29
System for testing integrated circuit devices App 20030090285 - Sher, Joseph C. ; et al.	2003-05-15
Device and method to reduce wordline RC time constant in semiconductor memory devices App 20020131290 - Vo, Huy Thanh	2002-09-19
Circuits and methods for selectively coupling redundant elements into an integrated circuit Grant 6,077,211 - Vo June 20, 2	2000-06-20
Method and apparatus for a high speed cyclical redundancy check system Grant 5,854,800 - Thomann , et al. December 29, 1	1998-12-29
Programmable data port clocking system with automatic disable and noise suppression for asynchronous transfer mode systems Grant 5,838,959 - Thomann , et al. November 17, 1	1998-11-17
Method and circuit for transferring data with dynamic parity generation and checking scheme in multi-port DRAM Grant 5,778,007 - Thomann , et al. July 7, 1	1998-07-07
Multiport datapath system Grant 5,748,635 - Thomann , et al. May 5, 1	1998-05-05
Method and circuit for transferring data with dynamic parity generation and checking scheme in multi-port DRAM Grant 5,719,890 - Thomman , et al. February 17, 1	1998-02-17
Programmable data port clocking system for clocking a plurality of data ports with a plurality of clocking signals in an asynchronous transfer mode system Grant 5,680,595 - Thomann , et al. October 21, 1	1997-10-21

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