Viswanathan; Natarajan

Patent Applications and Registrations

Patent applications and USPTO patent grants for Viswanathan; Natarajan.The latest application filed is for "large cluster persistence during placement optimization of integrated circuit designs".

Company Profile

5.50.34

Viswanathan; Natarajan - Austin TX
Viswanathan; Natarajan - Sunnyvale CA
Viswanathan; Natarajan - Saratoga CA
Viswanathan; Natarajan - Ames IA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Machine-learning based prediction method for iterative clustering during clock tree synthesis Grant 11,244,099 - Jiang , et al. February 8, 2	2022-02-08
Dynamic weighting scheme for local cluster refinement Grant 11,188,702 - Jiang , et al. November 30, 2	2021-11-30
Modifying route topology to fix clock tree violations Grant 10,963,617 - Chapman , et al. March 30, 2	2021-03-30
Large cluster persistence during placement optimization of integrated circuit designs Grant 10,685,160 - Kim , et al.	2020-06-16
Region aware clustering Grant 10,402,522 - Viswanathan , et al. Sep	2019-09-03
Balanced scaled-load clustering Grant 10,318,693 - Viswanathan , et al.	2019-06-11
Local cluster refinement Grant 10,289,797 - Viswanathan , et al.	2019-05-14
Large Cluster Persistence During Placement Optimization Of Integrated Circuit Designs App 20190026418 - Kim; Myung-Chul ; et al.	2019-01-24
Large cluster persistence during placement optimization of integrated circuit designs Grant 10,140,409 - Kim , et al. Nov	2018-11-27
Noise cancellation technique for capacitive touchscreen controller using differential sensing Grant 9,870,097 - Joharapurkar , et al. January 16, 2	2018-01-16
Large Cluster Persistence During Placement Optimization Of Integrated Circuit Designs App 20170220722 - KIM; MYUNG-CHUL ; et al.	2017-08-03
Element placement in circuit design based on preferred location Grant 9,524,363 - Alpert , et al. December 20, 2	2016-12-20
Large cluster persistence during placement optimization of integrated circuit designs Grant 9,495,501 - Kim , et al. November 15, 2	2016-11-15
Noise Cancellation Technique For Capacitive Touchscreen Controller Using Differential Sensing App 20160313863 - Joharapurkar; Ashutosh Ravindra ; et al.	2016-10-27
Use Of Random Sampling Technique To Reduce Finger-coupled Noise App 20160291797 - Joharapurkar; Ashutosh Ravindra ; et al.	2016-10-06
Noise cancellation technique for capacitive touchscreen controller using differential sensing Grant 9,442,610 - Joharapurkar , et al. September 13, 2	2016-09-13
Noise Cancellation Tecnique For Capacitive Touchscreen Controller Using Differential Sensing App 20160209947 - Joharapurkar; Ashutosh R. ; et al.	2016-07-21
Use of random sampling technique to reduce finger-coupled noise Grant 9,391,607 - Joharapurkar , et al. July 12, 2	2016-07-12
Alignment net insertion for straightening the datapath in a force-directed placer Grant 9,251,306 - Kim , et al. February 2, 2	2016-02-02
Boundary latch and logic placement to satisfy timing constraints Grant 9,098,669 - Alpert , et al. August 4, 2	2015-08-04
Boundary Latch And Logic Placement To Satisfy Timing Constraints App 20150199465 - Alpert; Charles J. ; et al.	2015-07-16
Structured placement of latches/flip-flops to minimize clock power in high-performance designs Grant 8,954,912 - Alpert , et al. February 10, 2	2015-02-10
Method and apparatus for improving dynamic range of a touchscreen controller Grant 8,830,207 - Joharapurkar , et al. September 9, 2	2014-09-09
Placement of structured nets Grant 8,793,636 - Alpert , et al. July 29, 2	2014-07-29
Post-placement cell shifting Grant 8,782,584 - Alpert , et al. July 15, 2	2014-07-15
Separate refinement of local wirelength and local module density in intermediate placement of an integrated circuit design Grant 8,769,457 - Alpert , et al. July 1, 2	2014-07-01
Structured Placement Of Latches/flip-flops To Minimize Clock Power In High-performance Designs App 20140149957 - Alpert; Charles J. ; et al.	2014-05-29
Electronic design automation object placement with partially region-constrained objects Grant 8,683,411 - Alpert , et al. March 25, 2	2014-03-25
Latch clustering with proximity to local clock buffers Grant 8,677,299 - Alpert , et al. March 18, 2	2014-03-18
Clock optimization with local clock buffer control optimization Grant 8,667,441 - Alpert , et al. March 4, 2	2014-03-04
Separate Refinement Of Local Wirelength And Local Module Density In Intermediate Placement Of An Integrated Circuit Design App 20140007036 - Alpert; Charles J. ; et al.	2014-01-02
Post-placement Cell Shifting App 20130346938 - Alpert; Charles J ; et al.	2013-12-26
Element Placement In Circuit Design Based On Preferred Location App 20130326455 - Alpert; Charles J. ; et al.	2013-12-05
Local objective optimization in global placement of an integrated circuit design Grant 8,595,675 - Alpert , et al. November 26, 2	2013-11-26
Datapath placement using tiered assignment Grant 8,589,848 - Alpert , et al. November 19, 2	2013-11-19
Datapath Placement Using Tiered Assignment App 20130283225 - Alpert; Charles J. ; et al.	2013-10-24
Alignment Net Insertion For Straightening The Datapath In A Force-directed Placer App 20130205272 - Kim; Myung-Chul ; et al.	2013-08-08
Noise cancellation technique for capacitive touchscreen controller using differential sensing Grant 8,493,356 - Joharapurkar , et al. July 23, 2	2013-07-23
Multi-patterning lithography aware cell placement in integrated circuit design Grant 8,495,548 - Agarwal , et al. July 23, 2	2013-07-23
Post-placement cell shifting Grant 8,495,534 - Alpert , et al. July 23, 2	2013-07-23
Latch clustering with proximity to local clock buffers Grant 8,458,634 - Alpert , et al. June 4, 2	2013-06-04
Alignment net insertion for straightening the datapath in a force-directed placer Grant 8,453,093 - Kim , et al. May 28, 2	2013-05-28
Alignment Net Insertion For Straightening The Datapath In A Force-directed Placer App 20130097573 - Kim; Myung-Chul ; et al.	2013-04-18
Accuracy pin-slew mode for gate delay calculation Grant 8,418,108 - Alpert , et al. April 9, 2	2013-04-09
Multi-patterning Lithography Aware Cell Placement In Integrated Circuit Design App 20130086543 - Agarwal; Kanak Behari ; et al.	2013-04-04
Detailed routability by cell placement Grant 8,347,257 - Alpert , et al. January 1, 2	2013-01-01
Incremental timing optimization and placement Grant 8,347,249 - Alpert , et al. January 1, 2	2013-01-01
Accuracy Pin-slew Mode For Gate Delay Calculation App 20120324409 - Alpert; Charles J. ; et al.	2012-12-20
Whitespace Creation And Preservation In Circuit Design App 20120297355 - Alpert; Charles Jay ; et al.	2012-11-22
Placement of Structured Nets App 20120266124 - Alpert; Charles J. ; et al.	2012-10-18
Clock Optimization with Local Clock Buffer Control Optimization App 20120124539 - Alpert; Charles J. ; et al.	2012-05-17
Latch Clustering With Proximity To Local Clock Buffers App 20120110532 - Alpert; Charles Jay ; et al.	2012-05-03
Electronic Design Automation Object Placement With Partially Region-constrained Objects App 20120054708 - Alpert; Charles J. ; et al.	2012-03-01
Detailed Routability By Cell Placement App 20110302545 - Alpert; Charles J. ; et al.	2011-12-08
Post-placement Cell Shifting App 20110302544 - Alpert; Charles J. ; et al.	2011-12-08
Use Of Random Sampling Technique To Reduce Finger-coupled Noise App 20110261008 - Joharapurkar; Ashutosh Ravindra ; et al.	2011-10-27
Noise Cancellation Technique For Capacitive Touchscreen Controller Using Differential Sensing App 20110261007 - Joharapurkar; Ashutosh Ravindra ; et al.	2011-10-27
Legalization of VLSI circuit placement with blockages using hierarchical row slicing Grant 7,934,188 - Alpert , et al. April 26, 2	2011-04-26
Method to reduce the wirelength of analytical placement techniques by modulation of spreading forces vectors Grant 7,882,475 - Alpert , et al. February 1, 2	2011-02-01
Incremental Timing Optimization And Placement App 20100257498 - Alpert; Charles J. ; et al.	2010-10-07
Legalization of VLSI circuit placement with blockages using hierarchical row slicing App 20090271752 - Alpert; Charles J. ; et al.	2009-10-29
Method To Reduce The Wirelength Of Analytical Placement Techniques By Modulation Of Spreading Forces Vectors App 20080282213 - Alpert; Charles J. ; et al.	2008-11-13
Method To Reduce The Wirelength Of Analytical Placement Techniques By Modulation Of Spreading Forces Vectors App 20080066037 - Alpert; Charles J. ; et al.	2008-03-13
Fastplace method for integrated circuit design Grant 7,266,796 - Chu , et al. September 4, 2	2007-09-04