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name:-0.033206939697266
name:-0.029042959213257
name:-0.004857063293457
Visokay; Mark Robert Patent Filings

Visokay; Mark Robert

Patent Applications and Registrations

Patent applications and USPTO patent grants for Visokay; Mark Robert.The latest application filed is for "trimmable silicon-based thermistor with reduced stress dependence".

Company Profile
4.19.28
  • Visokay; Mark Robert - Dallas TX
  • Visokay; Mark Robert - Wappingers Falls NY
  • Visokay; Mark Robert - Richardson TX
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Trimmable silicon-based thermistor with reduced stress dependence
Grant 11,004,929 - Lee , et al. May 11, 2
2021-05-11
Trimmable Silicon-based Thermistor With Reduced Stress Dependence
App 20200119132 - Lee; Dok Won ;   et al.
2020-04-16
Ic With 3d Metal-insulator-metal Capacitor
App 20200006471 - FERNANDES; POORNIKA ;   et al.
2020-01-02
Dummy contacts to mitigate plasma charging damage to gate dielectrics
Grant 10,249,621 - Visokay , et al.
2019-04-02
Dummy Contacts To Mitigate Plasma Charging Damage To Gate Dielectrics
App 20180175023 - VISOKAY; MARK ROBERT ;   et al.
2018-06-21
Process-compatible Sputtering Target For Forming Ferroelectric Memory Capacitor Plates
App 20150221516 - Visokay; Mark Robert ;   et al.
2015-08-06
Hydrogen-blocking film for ferroelectric capacitors
Grant 8,822,236 - Lin , et al. September 2, 2
2014-09-02
Process-compatible Sputtering Target For Forming Ferroelectric Memory Capacitor Plates
App 20140147940 - Visokay; Mark Robert ;   et al.
2014-05-29
Hydrogen-blocking Film For Ferroelectric Capacitors
App 20130309783 - Lin; Bo-Yang ;   et al.
2013-11-21
Hydrogen-Blocking Film for Ferroelectric Capacitors
App 20130056811 - Lin; Bo-Yang ;   et al.
2013-03-07
Method to attain low defectivity fully silicided gates
Grant 8,273,645 - Visokay , et al. September 25, 2
2012-09-25
Method To Attain Low Defectivity Fully Silicided Gates
App 20110097884 - VISOKAY; Mark Robert ;   et al.
2011-04-28
Triple-gate Transistor With Reverse Shallow Trench Isolation
App 20100323486 - Chambers; James Joseph ;   et al.
2010-12-23
Dual work function CMOS devices utilizing carbide based electrodes
Grant 7,842,567 - Chambers , et al. November 30, 2
2010-11-30
Structure and method for a triple-gate transistor with reverse STI
Grant 7,678,675 - Chambers , et al. March 16, 2
2010-03-16
Semiconductor CMOS devices and methods with NMOS high-k dielectric present in core region that mitigate damage to dielectric materials
Grant 7,642,146 - Chambers , et al. January 5, 2
2010-01-05
Structure for dual work function metal gate electrodes by control of interface dipoles
Grant 7,612,422 - Chambers , et al. November 3, 2
2009-11-03
Work function control of metals
Grant 7,601,577 - Chambers , et al. October 13, 2
2009-10-13
Dual Work Function Cmos Devices Utilizing Carbide Based Electrodes
App 20090068828 - Chambers; James Joseph ;   et al.
2009-03-12
Dual work function CMOS devices utilizing carbide based electrodes
Grant 7,470,577 - Chambers , et al. December 30, 2
2008-12-30
Structure And Method For A Triple-gate Transistor With Reverse Sti
App 20080268599 - Chambers; James Joseph ;   et al.
2008-10-30
Structure And Method For Dual Work Function Metal Gate Electrodes By Control Of Interface Dipoles
App 20080157228 - Chambers; James Joseph ;   et al.
2008-07-03
Semiconductor CMOS devices and methods with NMOS high-k dielectric formed prior to core PMOS silicon oxynitride dielectric formation using direct nitridation of silicon
Grant 7,351,632 - Visokay , et al. April 1, 2
2008-04-01
Work Function Control Of Metals
App 20080044957 - Chambers; James Joseph ;   et al.
2008-02-21
Work function control of metals
Grant 7,291,527 - Chambers , et al. November 6, 2
2007-11-06
Semiconductor CMOS devices and methods with NMOS high-k dielectric formed prior to core PMOS dielectric formation
Grant 7,226,830 - Colombo , et al. June 5, 2
2007-06-05
Semiconductor CMOS Devices and Methods with NMOS High-K Dielectric Present in Core Region that Mitigate Damage to Dielectric Materials
App 20070122962 - Chambers; James Joseph ;   et al.
2007-05-31
Work function control of metals
App 20070054446 - Chambers; James Joseph ;   et al.
2007-03-08
Dual work function CMOS devices utilizing carbide based electrodes
App 20070037335 - Chambers; James Joseph ;   et al.
2007-02-15
Work function separation for fully silicided gates
App 20070037333 - Colombo; Luigi ;   et al.
2007-02-15
Semiconductor CMOS devices and methods with NMOS high-k dielectric present in core region that mitigate damage to dielectric materials
Grant 7,176,076 - Chambers , et al. February 13, 2
2007-02-13
Methods that mitigate excessive source/drain silicidation in full gate silicidation metal gate flows
App 20060258074 - Visokay; Mark Robert ;   et al.
2006-11-16
Semiconductor CMOS devices and methods with NMOS high-k dielectric formed prior to core PMOS dielectric formation
App 20060246716 - Colombo; Luigi ;   et al.
2006-11-02
Semiconductor CMOS devices and methods with NMOS high-k dielectric present in core region that mitigate damage to dielectric materials
App 20060246651 - Chambers; James Joseph ;   et al.
2006-11-02
Semiconductor CMOS devices and methods with NMOS high-k dielectric formed prior to core PMOS silicon oxynitride dielectric formation using direct nitridation of silicon
App 20060246647 - Visokay; Mark Robert ;   et al.
2006-11-02
MOS transistor gates with thin lower metal silicide and methods for making the same
Grant 7,045,456 - Murto , et al. May 16, 2
2006-05-16
Method for integrating high-k dielectrics in transistor devices
Grant 7,045,431 - Rotondaro , et al. May 16, 2
2006-05-16
Method for fabricating split gate transistor device having high-k dielectrics
Grant 6,979,623 - Rotondaro , et al. December 27, 2
2005-12-27
Triple-gate MOSFET transistor and methods for fabricating the same
App 20050184319 - Chambers, James Joseph ;   et al.
2005-08-25
Methods for fabricating a triple-gate MOSFET transistor
Grant 6,927,106 - Chambers , et al. August 9, 2
2005-08-09
MOS transistor gates with thin lower metal silicide and methods for making the same
App 20050136605 - Murto, Robert William ;   et al.
2005-06-23
Implementation of split gate transistor technology with high-k gate dielectrics
App 20050136632 - Rotondaro, Antonio L.P. ;   et al.
2005-06-23
Method for integrating high-k dielectrics in transistor devices
App 20050136589 - Rotondaro, Antonio L.P. ;   et al.
2005-06-23
Triple-gate mosfet transistor and methods for fabricating the same
App 20050095764 - Chambers, James Joseph ;   et al.
2005-05-05
Bilayer deposition to avoid unwanted interfacial reactions during high K gate dielectric processing
Grant 6,696,332 - Visokay , et al. February 24, 2
2004-02-24
Bilayer deposition to avoid unwanted interfacial reactions during high K gate dielectric processing
App 20030116804 - Visokay, Mark Robert ;   et al.
2003-06-26

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