loadpatents
name:-0.034917116165161
name:-0.028501033782959
name:-0.00076103210449219
Violette; Mike Patent Filings

Violette; Mike

Patent Applications and Registrations

Patent applications and USPTO patent grants for Violette; Mike.The latest application filed is for "apparatuses and operation methods associated with resistive memory cell arrays with separate select lines".

Company Profile
0.29.30
  • Violette; Mike - Boise ID
  • Violette; Mike - US
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Apparatuses and operation methods associated with resistive memory cell arrays with separate select lines
Grant 9,548,335 - Liu , et al. January 17, 2
2017-01-17
Apparatuses And Operation Methods Associated With Resistive Memory Cell Arrays With Separate Select Lines
App 20160276409 - Liu; Zengtao T. ;   et al.
2016-09-22
Apparatuses and operation methods associated with resistive memory cell arrays with separate select lines
Grant 9,378,818 - Liu , et al. June 28, 2
2016-06-28
Resistive memory architectures with multiple memory cells per access device
Grant 8,976,562 - Liu , et al. March 10, 2
2015-03-10
Resistive memory cell fabrication methods and devices
Grant 8,835,893 - Liu , et al. September 16, 2
2014-09-16
Apparatuses And Operation Methods Associated With Resistive Memory Cell Arrays With Separate Select Lines
App 20140233300 - Liu; Zengtao T. ;   et al.
2014-08-21
Apparatuses and operation methods associated with resistive memory cell arrays with separate select lines
Grant 8,681,529 - Liu , et al. March 25, 2
2014-03-25
Phase change memory elements using energy conversion layers, memory arrays and systems including same, and methods of making and using same
Grant 8,659,002 - Liu , et al. February 25, 2
2014-02-25
Memory Elements Using Self-aligned Phase Change Material Layers And Methods Of Manufacturing Same
App 20130248810 - Liu; Jun ;   et al.
2013-09-26
Apparatuses And Operation Methods Associated With Resistive Memory Cell Arrays With Separate Select Lines
App 20130121056 - Liu; Zengtao T. ;   et al.
2013-05-16
Phase Change Memory Elements Using Energy Conversion Layers, Memory Arrays And Systems Including Same, And Methods Of Making And Using Same
App 20120281466 - Liu; Jun ;   et al.
2012-11-08
Resistive Memory Cell Fabrication Methods And Devices
App 20120223285 - Liu; Jun ;   et al.
2012-09-06
Phase change memory elements using energy conversion layers, memory arrays and systems including same, and methods of making and using same
Grant 8,241,947 - Liu , et al. August 14, 2
2012-08-14
Resistive memory cell fabrication methods and devices
Grant 8,193,521 - Liu , et al. June 5, 2
2012-06-05
Method and apparatus providing high density chalcogenide-based data storage
Grant 8,189,450 - Liu , et al. May 29, 2
2012-05-29
Resistive Memory Architectures With Multiple Memory Cells Per Access Device
App 20120056146 - Liu; Jun ;   et al.
2012-03-08
Resistive memory architectures with multiple memory cells per access device
Grant 8,076,195 - Liu , et al. December 13, 2
2011-12-13
Method And Apparatus Providing High Density Chalcogenide-based Data Storage
App 20110149637 - Liu; Jun ;   et al.
2011-06-23
Phase change memory structure with multiple resistance states and methods of programming and sensing same
Grant 7,952,919 - Liu , et al. May 31, 2
2011-05-31
Phase Change Memory Structure With Multiple Resistance States And Methods Of Programming And Sensing
App 20110062409 - Liu; Jun ;   et al.
2011-03-17
Phase change memory structure with multiple resistance states and methods of programming and sensing same
Grant 7,859,893 - Liu , et al. December 28, 2
2010-12-28
Resistive memory device
Grant 7,859,888 - Liu , et al. December 28, 2
2010-12-28
Phase Change Memory Elements Using Energy Conversion Layers, Memory Arrays And Systems Including Same, And Methods Of Making And Using Same
App 20100321992 - Liu; Jun ;   et al.
2010-12-23
Phase change memory elements using energy conversion layers, memory arrays and systems including same, and methods of making and using
Grant 7,800,092 - Liu , et al. September 21, 2
2010-09-21
Resistive Memory Cell Fabrication Methods And Devices
App 20100230654 - Liu; Jun ;   et al.
2010-09-16
Method and apparatus providing high density data storage
Grant 7,773,492 - Liu , et al. August 10, 2
2010-08-10
Resistive memory cell fabrication methods and devices
Grant 7,745,231 - Liu , et al. June 29, 2
2010-06-29
Resistive memory architectures with multiple memory cells per access device
App 20100151637 - Liu; Jun ;   et al.
2010-06-17
Resistive memory architectures with multiple memory cells per access device
Grant 7,684,227 - Liu , et al. March 23, 2
2010-03-23
Resistive Memory Device
App 20090225591 - Liu; Jun ;   et al.
2009-09-10
Resistive memory device
Grant 7,545,669 - Liu , et al. June 9, 2
2009-06-09
Phase change memory structure with multiple resistance states and methods of programming an sensing same
App 20080298114 - Liu; Jin ;   et al.
2008-12-04
Resistive memory architectures with multiple memory cells per access device
App 20080298113 - Liu; Jun ;   et al.
2008-12-04
Resistive memory cell fabrication methods and devices
App 20080258125 - Liu; Jun ;   et al.
2008-10-23
Resistive memory device
Grant 7,397,689 - Liu , et al. July 8, 2
2008-07-08
Resistive Memory Device
App 20080130353 - LIU; JUN ;   et al.
2008-06-05
Phase change memory elements using energy conversion layers, memory arrays and systems including same, and methods of making and using
App 20080044632 - Liu; Jun ;   et al.
2008-02-21
Resistive Memory Device
App 20080037317 - Liu; Jun ;   et al.
2008-02-14
Method and apparatus providing high density data storage
App 20070242500 - Liu; Jun ;   et al.
2007-10-18
LOCOS trench isolation structures
App 20060231902 - Gonzalez; Fernando ;   et al.
2006-10-19
Suppression of cross diffusion and gate depletion
App 20050266666 - Trivedi, Jigish D. ;   et al.
2005-12-01
Suppression of cross diffusion and gate depletion
Grant 6,962,841 - Trivedi , et al. November 8, 2
2005-11-08
Method of selectively forming local interconnects using design rules
Grant 6,930,901 - Abbott , et al. August 16, 2
2005-08-16
Method of using high-k dielectric materials to reduce soft errors in SRAM memory cells, and a device comprising same
Grant 6,900,494 - Abbott , et al. May 31, 2
2005-05-31
Locos trench isolation structure
App 20050012158 - Gonzalez, Fernando ;   et al.
2005-01-20
Suppression of cross diffusion and gate depletion
Grant 6,812,529 - Trivedi , et al. November 2, 2
2004-11-02
Isolation structure having trench structures formed on both side of a locos
Grant 6,809,395 - Gonzales , et al. October 26, 2
2004-10-26
Method of using high-k dielectric materials to reduce soft errors in SRAM memory cells, and a device comprising same
App 20040159895 - Abbott, Todd R. ;   et al.
2004-08-19
Method of using high-k dielectric materials to reduce soft errors in SRAM memory cells, and a device comprising same
Grant 6,723,597 - Abbott , et al. April 20, 2
2004-04-20
Suppression of cross diffusion and gate depletion
App 20040048431 - Trivedi, Jigish D. ;   et al.
2004-03-11
Method Of Using High-k Dielectric Materials To Reduce Soft Errors In Sram Memory Cells, And A Device Comprising Same
App 20040009633 - Abbott, Todd R. ;   et al.
2004-01-15
Method of selectively forming local interconnects using design rules
App 20030036258 - Abbott, Todd ;   et al.
2003-02-20
Suppression of cross diffusion and gate depletion
App 20020132441 - Trivedi, Jigish D. ;   et al.
2002-09-19
Method of selectively forming local interconnects using design rules
App 20020114180 - Abbott, Todd ;   et al.
2002-08-22

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