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name:-0.0097219944000244
name:-0.0076940059661865
name:-0.00040388107299805
Villaret; Alexandre Patent Filings

Villaret; Alexandre

Patent Applications and Registrations

Patent applications and USPTO patent grants for Villaret; Alexandre.The latest application filed is for "memory cell comprising one mos transistor with an isolated body having an improved read sensitivity".

Company Profile
0.6.7
  • Villaret; Alexandre - Grenoble FR
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Memory cell comprising one MOS transistor with an isolated body having an improved read sensitivity
Grant 7,709,875 - Villaret , et al. May 4, 2
2010-05-04
Vertical IMOS transistor having a PIN diode formed within
Grant 7,608,867 - Charbuillet , et al. October 27, 2
2009-10-27
Memory cell comprising one MOS transistor with an isolated body having a reinforced memory effect
Grant 7,541,636 - Ranica , et al. June 2, 2
2009-06-02
Memory cell comprising one MOS transistor with an isolated body having an improved read sensitivity
App 20070023809 - Villaret; Alexandre ;   et al.
2007-02-01
Memory cell comprising one MOS transistor with an isolated body having a reinforced memory effect
App 20070013030 - Ranica; Rossella ;   et al.
2007-01-18
Memory cell comprising one MOS transistor with an isolated body having a prolonged memory effect
App 20070001165 - Ranica; Rossella ;   et al.
2007-01-04
IMOS transistor
App 20060220086 - Charbuillet; Clement ;   et al.
2006-10-05
Integrated memory circuit for storing a binary datum in a memory cell
Grant 7,042,039 - Mazoyer , et al. May 9, 2
2006-05-09
Method for storing a binary datum in a memory cell of an integrated memory circuit, corresponding integrated circuit and fabrication method
App 20040150024 - Mazoyer, Pascale ;   et al.
2004-08-05
Integrated semiconductor DRAM-type memory device and corresponding fabrication process
Grant 6,759,721 - Skotnicki , et al. July 6, 2
2004-07-06
Process for manufacturing an isolated-gate transistor with an architecture of the substrate-on-insulator type, and corresponding transistor
Grant 6,656,782 - Skotnicki , et al. December 2, 2
2003-12-02
Integrated semiconductor DRAM-type memory device and corresponding fabrication process
App 20030006431 - Skotnicki, Thomas ;   et al.
2003-01-09
Process for manufacturing an isolated-gate transistor with an architecture of the substrate-on-insulator type, and corresponding transistor
App 20020135020 - Skotnicki, Thomas ;   et al.
2002-09-26

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