Vikhliantsev; Igor

Patent Applications and Registrations

Patent applications and USPTO patent grants for Vikhliantsev; Igor.The latest application filed is for "architectural floorplan for a structured asic manufactured on a 28 nm cmos process lithographic node or smaller".

Company Profile

0.10.12

Vikhliantsev; Igor - San Jose CA
Vikhliantsev; Igor - Sunnyvale CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Architectural floorplan for a structured ASIC manufactured on a 28 NM CMOS process lithographic node or smaller Grant 9,024,657 - Andreev , et al. May 5, 2	2015-05-05
Architectural Floorplan for a Structured ASIC Manufactured on a 28 NM CMOS Process Lithographic Node or Smaller App 20140103959 - Andreev; Alexander ; et al.	2014-04-17
Circuits for implementing parity computation in a parallel architecture LDPC decoder Grant 8,347,167 - Andreev , et al. January 1, 2	2013-01-01
Methods and apparatus for programmable decoding of a plurality of code types Grant 8,035,537 - Andreev , et al. October 11, 2	2011-10-11
Parallel LDPC Decoder App 20110173510 - Andreev; Alexander ; et al.	2011-07-14
Low Complexity LDPC Encoding Algorithm App 20110099454 - Gribok; Sergey ; et al.	2011-04-28
Parallel LDPC decoder Grant 7,934,139 - Andreev , et al. April 26, 2	2011-04-26
Low complexity LDPC encoding algorithm Grant 7,913,149 - Gribok , et al. March 22, 2	2011-03-22
Circuits For Implementing Parity Computation In A Parallel Architecture Ldpc Decoder App 20100162071 - Andreev; Alexander ; et al.	2010-06-24
High performance tiling for RRAM memory Grant 7,739,471 - Andreev , et al. June 15, 2	2010-06-15
Methods and apparatus for fast unbalanced pipeline architecture Grant 7,667,494 - Andreev , et al. February 23, 2	2010-02-23
Methods And Apparatus For Programmable Decoding Of A Plurality Of Code Types App 20090309770 - Andreev; Alexander ; et al.	2009-12-17
Methods And Apparatus For Fast Unbalanced Pipeline Architecture App 20090243657 - Andreev; Alexander ; et al.	2009-10-01
Low Complexity LDPC Encoding Algorithm App 20080168334 - Gribok; Sergey ; et al.	2008-07-10
Parallel LDPC Decoder App 20080134008 - Andreev; Alexander ; et al.	2008-06-05
High performance tiling for RRAM memory App 20070091105 - Andreev; Alexander ; et al.	2007-04-26
Memory tiling architecture Grant 7,207,026 - Andreev , et al. April 17, 2	2007-04-17
Memory generation and placement Grant 7,155,688 - Andreev , et al. December 26, 2	2006-12-26
Integrated circuit and process for identifying minimum or maximum input value among plural inputs Grant 7,072,922 - Andreev , et al. July 4, 2	2006-07-04
Memory generation and placement App 20060107247 - Andreev; Alexandre ; et al.	2006-05-18
Memory tiling architecture App 20060104145 - Andreev; Alexandre ; et al.	2006-05-18
Integrated circuit and process for identifying minimum or maximum input value among plural inputs App 20040117416 - Andreev, Alexander E. ; et al.	2004-06-17

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