VIGAR; David

Patent Applications and Registrations

Patent applications and USPTO patent grants for VIGAR; David.The latest application filed is for "slot designs in wide metal lines".

Company Profile

0.13.12

VIGAR; David - Singapore SG
Vigar; David - Cambridge GB

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Slot Designs In Wide Metal Lines App 20160233157 - LIM; Yeow Kheng ; et al.	2016-08-11
Slot designs in wide metal lines Grant 9,318,378 - Lim , et al. April 19, 2	2016-04-19
Ultra Low Power Transistor for 40nm Processes App 20150270367 - Vigar; David ; et al.	2015-09-24
Gate depletion drain extended MOS transistor Grant 9,012,998 - Herberholz , et al. April 21, 2	2015-04-21
Gate Depletion Drain Extended Mos Transistor App 20150044838 - Herberholz; Rainer ; et al.	2015-02-12
Gate depletion drain extended MOS transistor Grant 8,816,441 - Herberholz , et al. August 26, 2	2014-08-26
On-gate contacts in a MOS device Grant 8,658,524 - Herberholz , et al. February 25, 2	2014-02-25
On-gate Contacts In A Mos Device App 20120248512 - Herberholz; Rainer ; et al.	2012-10-04
Gate Depletion Drain Extended Mos Transistor App 20110266626 - Herberholz; Rainer ; et al.	2011-11-03
One-time Programmable Charge-trapping Non-volatile Memory Device App 20110156157 - Milani; Luca ; et al.	2011-06-30
Analogue Thin-oxide Mosfet App 20100308415 - Herberholz; Rainer ; et al.	2010-12-09
Method to make corner cross-grid structures in copper metallization Grant 7,314,811 - Tan , et al. January 1, 2	2008-01-01
Double-gated silicon-on-insulator (SOI) transistors with corner rounding Grant 7,141,854 - Lee , et al. November 28, 2	2006-11-28
Device, design and method for a slot in a conductive area Grant 7,089,522 - Tan , et al. August 8, 2	2006-08-08
Slot designs in wide metal lines App 20060040491 - Lim; Yeow Kheng ; et al.	2006-02-23
Method of forming double-gated silicon-on-insulator (SOI) transistors with corner rounding App 20060014336 - Meng Lee; Yong ; et al.	2006-01-19
Novel method to make corner cross-grid structures in copper metallization App 20050196938 - Tan, Patrick ; et al.	2005-09-08
Method of forming double-gated silicon-on-insulator (SOI) transistors with corner rounding Grant 6,927,104 - Lee , et al. August 9, 2	2005-08-09
Method of forming double-gated silicon-on-insulator (SOI) transistors with corner rounding App 20050059194 - Lee, Yong Meng ; et al.	2005-03-17
Method of forming double-gate semiconductor-on-insulator (SOI) transistors Grant 6,835,609 - Lee , et al. December 28, 2	2004-12-28
Device, design and method for a slot in a conductive area App 20040255259 - Tan, Patrick ; et al.	2004-12-16
Method of forming double-gated silicon-on-insulator (SOI) transistors with reduced gate to source-drain overlap capacitance Grant 6,787,404 - Lee , et al. September 7, 2	2004-09-07

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