loadpatents
name:-0.027599096298218
name:-0.019306898117065
name:-0.00069308280944824
Versen; Martin Patent Filings

Versen; Martin

Patent Applications and Registrations

Patent applications and USPTO patent grants for Versen; Martin.The latest application filed is for "circuit and method for limiting a current flow in case of a shortage of a support capacitor".

Company Profile
0.17.23
  • Versen; Martin - Feldkirchen-Westerham DE
  • Versen; Martin - Feldkirchen DE
  • Versen; Martin - Feldkirchen/Westham DE
  • Versen; Martin - Munchen DE
  • Versen; Martin - Munich DE
  • Versen; Martin - Burlington VT
  • Versen; Martin - Desterharen DE
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Method and system for testing an integrated circuit
Grant 7,729,186 - Kliewer , et al. June 1, 2
2010-06-01
Circuit and Method for Limiting a Current Flow in Case of a Shortage of a Support Capacitor
App 20090295342 - Versen; Martin ;   et al.
2009-12-03
Sense-amplifier circuit for a memory device with an open bit line architecture
Grant 7,542,362 - Versen , et al. June 2, 2
2009-06-02
Sense-amplifier Circuit For A Memory Device With An Open Bit Line Architecture
App 20090097347 - Versen; Martin ;   et al.
2009-04-16
Memory Circuit, Memory Component, Data Processing System and Method of Testing a Memory Circuit
App 20090021996 - Versen; Martin ;   et al.
2009-01-22
Test method for determining the wire configuration for circuit carriers with components arranged thereon
Grant 7,428,673 - Kliewer , et al. September 23, 2
2008-09-23
Method and System for Testing an Integrated Circuit
App 20080205173 - Kliewer; Joerg ;   et al.
2008-08-28
Redundant wordline deactivation scheme
Grant 7,405,986 - Versen , et al. July 29, 2
2008-07-29
Method and apparatus for checking output signals of an integrated circuit
Grant 7,380,182 - Beer , et al. May 27, 2
2008-05-27
Test mode method and apparatus for internal memory timing signals
Grant 7,339,841 - Versen , et al. March 4, 2
2008-03-04
Monitoring device for monitoring internal signals during initialization of an electronic circuit
Grant 7,340,313 - Moser , et al. March 4, 2
2008-03-04
Voltage monitoring test mode and test adapter
Grant 7,308,624 - Versen , et al. December 11, 2
2007-12-11
Method And System For Testing A Memory Device
App 20070250745 - Schneider; Ralf ;   et al.
2007-10-25
Serial presence detect functionality on memory component
Grant 7,263,019 - Nierle , et al. August 28, 2
2007-08-28
Test mode for IPP current measurement for wordline defect detection
Grant 7,257,038 - Killian , et al. August 14, 2
2007-08-14
Test mode for IPP current measurement for wordline defect detection
App 20070153596 - Kilian; Michael A. ;   et al.
2007-07-05
Chip specific test mode execution on a memory module
App 20070094554 - Versen; Martin ;   et al.
2007-04-26
Integrated semiconductor memory with redundant memory cells
Grant 7,203,106 - Versen , et al. April 10, 2
2007-04-10
Redundant wordline deactivation scheme
App 20070070745 - Versen; Martin ;   et al.
2007-03-29
Test mode method and apparatus for internal memory timing signals
App 20070064505 - Versen; Martin ;   et al.
2007-03-22
Serial presence detect functionality on memory component
App 20070058470 - Nierle; Klaus ;   et al.
2007-03-15
Method for testing an electric circuit
Grant 7,191,085 - Neyer , et al. March 13, 2
2007-03-13
Method for testing an integrated semiconductor memory
Grant 7,184,337 - Versen February 27, 2
2007-02-27
Testmode and test method for increased stress duty cycles during burn in
App 20070038804 - Nierle; Klaus ;   et al.
2007-02-15
Voltage monitoring test mode and test adapter
App 20060248413 - Versen; Martin ;   et al.
2006-11-02
Method for the defect analysis of memory modules
Grant 7,124,336 - Adler , et al. October 17, 2
2006-10-17
Method for testing the serviceability of bit lines in a DRAM memory device
Grant 7,120,070 - Versen , et al. October 10, 2
2006-10-10
Method for testing an electric circuit
App 20060049844 - Neyer; Thomas ;   et al.
2006-03-09
Test method for determining the wire configuration for circuit carriers with components arranged thereon
App 20060053354 - Kliewer; Jorg ;   et al.
2006-03-09
Method for testing an integrated semiconductor memory
App 20060044900 - Versen; Martin
2006-03-02
Method for testing the serviceability of bit lines in a DRAM memory device
App 20060048022 - Versen; Martin ;   et al.
2006-03-02
Integrated semiconductor memory with redundant memory cells
App 20060023556 - Versen; Martin ;   et al.
2006-02-02
Monitoring device for monitoring internal signals during initialization of an electronic circuit unit
App 20050209715 - Moser, Manfred ;   et al.
2005-09-22
Method and apparatus for checking output signals of an integrated circuit
App 20050114734 - Beer, Peter ;   et al.
2005-05-26
Method and test circuit for testing a dynamic memory circuit
Grant 6,862,234 - Versen , et al. March 1, 2
2005-03-01
Method and test circuit for testing a dynamic memory circuit
App 20040257893 - Versen, Martin ;   et al.
2004-12-23
Method for determining the transit time of electrical signals on printed circuit boards using automatic standard test equipment
Grant 6,703,844 - Adler , et al. March 9, 2
2004-03-09
Memory management configuration and method for making a main memory
App 20040034809 - Versen, Martin ;   et al.
2004-02-19
Method for determining the transit time of electrical signals on printed circuit boards using automatic standard test equipment
App 20030034784 - Adler, Frank ;   et al.
2003-02-20
Method for the defect analysis of memory modules
App 20030028342 - Adler, Frank ;   et al.
2003-02-06

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