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name:-0.019731044769287
name:-0.016974925994873
name:-0.0004570484161377
Verhaege; Koen Gerard Maria Patent Filings

Verhaege; Koen Gerard Maria

Patent Applications and Registrations

Patent applications and USPTO patent grants for Verhaege; Koen Gerard Maria.The latest application filed is for "electrostatic discharge protection structures for high speed technologies with mixed and ultra-low voltage supplies".

Company Profile
0.14.10
  • Verhaege; Koen Gerard Maria - Gistel BE
  • Verhaege; Koen Gerard Maria - Princeton NJ
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Electrostatic discharge protection structures for high speed technologies with mixed and ultra-low voltage supplies
Grant 7,589,944 - Mergens , et al. September 15, 2
2009-09-15
Electrostatic discharge protection structures for high speed technologies with mixed and ultra-low voltage supplies
Grant 7,548,401 - Mergens , et al. June 16, 2
2009-06-16
Silicon controlled rectifier electrostatic discharge protection device for power supply lines with powerdown mode of operation
Grant 7,274,047 - Russ , et al. September 25, 2
2007-09-25
Method and apparatus for protecting a gate oxide using source/bulk pumping
Grant 7,233,467 - Mergens , et al. June 19, 2
2007-06-19
Electrostatic discharge protection structures for high speed technologies with mixed and ultra-low voltage supplies
App 20070058307 - Mergens; Markus Paul Josef ;   et al.
2007-03-15
Electrostatic discharge protection structures having high holding current for latch-up immunity
Grant 7,064,393 - Mergens , et al. June 20, 2
2006-06-20
Minimum-dimension, fully-silicided MOS driver and ESD protection design for optimized inter-finger coupling
Grant 7,005,708 - Mergens , et al. February 28, 2
2006-02-28
Method and apparatus for protecting a gate oxide using source/bulk pumping
App 20050231866 - Mergens, Markus Paul Josef ;   et al.
2005-10-20
Low voltage silicon controlled rectifier (SCR) for electrostatic discharge (ESD) protection of silicon-on-insulator technologies
App 20050212051 - Jozwiak, Phillip Czeslaw ;   et al.
2005-09-29
Silicon controlled rectifier electrostatic discharge protection device for power supply lines with powerdown mode of operation
App 20050145947 - Russ, Cornelius Christian ;   et al.
2005-07-07
Low voltage silicon controlled rectifier (SCR) for electrostatic discharge (ESD) protection of silicon-on-insulator technologies
Grant 6,909,149 - Russ , et al. June 21, 2
2005-06-21
Electrostatic discharge protection structures for high speed technologies with mixed and ultra-low voltage supplies
App 20050057866 - Mergens, Markus Paul Josef ;   et al.
2005-03-17
Silicon controlled rectifier electrostatic discharge protection device for power supply lines with powerdown mode of operation
Grant 6,850,397 - Russ , et al. February 1, 2
2005-02-01
Low voltage silicon controlled rectifier (SCR) for electrostatic discharge (ESD) protection of silicon-on-insulator technologies
App 20040207021 - Russ, Cornelius Christian ;   et al.
2004-10-21
Silicon controlled rectifier electrostatic discharge protection device for power supply lines with powerdown mode of operation
App 20040201033 - Russ, Cornelius Christian ;   et al.
2004-10-14
Electrostatic discharge protection structures having high holding current for latch-up immunity
Grant 6,803,633 - Mergens , et al. October 12, 2
2004-10-12
Minimum-dimension, fully- silicided MOS driver and ESD protection design for optimized inter-finger coupling
App 20040164354 - Mergens, Markus Paul Josef ;   et al.
2004-08-26
Electrostatic discharge protection structures for high speed technologies with mixed and ultra-low voltage supplies
Grant 6,768,616 - Mergens , et al. July 27, 2
2004-07-27
Double triggering mechanism for achieving faster turn-on
Grant 6,618,233 - Russ , et al. September 9, 2
2003-09-09
Apparatus for current ballasting ESD sensitive devices
Grant 6,587,320 - Russ , et al. July 1, 2
2003-07-01
Multi-finger current ballasting ESD protection circuit and interleaved ballasting for ESD-sensitive circuits
Grant 6,583,972 - Verhaege , et al. June 24, 2
2003-06-24
Circuits for dynamic turn off of NMOS output drivers during EOS/ESD stress
Grant 6,529,359 - Verhaege , et al. March 4, 2
2003-03-04
Electrostatic discharge protection structures having high holding current for latch-up immunity
App 20020153571 - Mergens, Markus Paul Josef ;   et al.
2002-10-24
Electrostatic discharge protection structures for high speed technologies with mixed and ultra-low voltage supplies
App 20020154463 - Mergens, Markus Paul Josef ;   et al.
2002-10-24

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