Verdoorn, Jr.; William Garrett
Patent Applications and Registrations
Patent applications and USPTO patent grants for Verdoorn, Jr.; William Garrett.The latest application filed is for "multi-node configuration of processor cards connected via processor fabrics".
- Verdoorn, Jr.; William Garrett - Rochester MN
| Patent | Date |
|---|---|
| Multi-node configuration of processor cards connected via processor fabrics Grant 8,095,691 - Verdoorn, Jr. , et al. January 10, 2 | 2012-01-10 |
| Multi-node Configuration Of Processor Cards Connected Via Processor Fabrics App 20100268986 - Verdoorn, JR.; William Garrett ; et al. | 2010-10-21 |
| Multi-node configuration of processor cards connected via processor fabrics Grant 7,783,813 - Verdoorn, Jr. , et al. August 24, 2 | 2010-08-24 |
| Apparatus, system, and method for mandatory end to end integrity checking in a storage system Grant 7,562,284 - Benhase , et al. July 14, 2 | 2009-07-14 |
| Apparatus, system, and method for error checking and recovery of transmitted data in a SCSI environment Grant 7,376,863 - Benhase , et al. May 20, 2 | 2008-05-20 |
| System and method for supporting access to multiple I/O hub nodes in a host bridge Grant 6,920,519 - Beukema , et al. July 19, 2 | 2005-07-19 |
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