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Measurement Of Power Consumption Within An Integrated Circuit
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Design Structures Including Circuits For Noise Reduction In Digital Systems
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Noise reduction in digital systems when the noise is caused by simultaneously clocking data registers
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Method and architecture for power management of an electronic device
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Noise Reduction In Digital Systems
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Method And Architecture For Power Management Of An Electronic Device
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Noise Reduction In Digital Systems
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Method And Architecture For Power Management Of An Electronic Device
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Clock signal distribution utilizing differential sinusoidal signal pair
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Clock signal distribution utilizing differential sinusoidal signal pair
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Noise Reduction In Digital Systems
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Clock signal distribution utilizing differential sinusoidal signal pair
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Method and apparatus for providing bus arbitrations in a data processing system
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Auto-linking of function logic state with testcase regression list
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Coding Of Fpga And Standard Cell Logic In A Tiling Structure
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Method and apparatus for reducing power consumption of a processing integrated circuit
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Method and system for optimizing code using an optimizing coprocessor
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Method and apparatus for providing bus arbitrations in a data processing system
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Method and apparatus for reducing power comsumption of a processing integrated circuit
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Clock signal distribution utilizing differential sinusoidal signal pair
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Stacked voltage rails for low-voltage DC distribution
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Managing VT for reduced power using power setting commands in the instruction stream
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Method and system for optimizing code using an optimizing coprocessor
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High level automatic core configuration
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Stacked voltage rails for low-voltage DC distribution
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Self regulating temperature/performance/voltage scheme for micros (X86)
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Self regulating temperature/performance/voltage scheme for micros (X86)
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