Ventana Micro Systems Inc.

USPTO Trademark & Patent Filings

Ventana Micro Systems Inc

Trademark applications and grants for Ventana Micro Systems Inc.. Ventana Micro Systems Inc. has 1 trademark applications. The latest application filed is for "VEYRON"

Company Profile
    Company Aliases
  • Ventana Micro Systems Inc.
  • Ventana Micro Systems Inc. - San Jose CA US
  • Ventana Micro Systems Inc. - Cupertino CA US
State Incorporated DELAWARE
Entity Type CORPORATION
Address 20863 Stevens Creek Blvd, Suite 456 Cupertino, CALIFORNIA UNITED STATES 95014

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Trademarks Patents
Patent Applications
Patent ApplicationDate
PROCESSOR THAT MITIGATES SIDE CHANNEL ATTACKS BY REFRAINING FROM ALLOCATING AN ENTRY IN A DATA TLB FOR A MISSING LOAD ADDRESS WHEN THE LOAD ADDRESS MISSES BOTH IN A DATA CACHE MEMORY AND IN THE DATA TLB AND THE LOAD ADDRESS SPECIFIES A LOCATION WITHOUT A VALID ADDRESS TRANSLATION OR WITHOUT PERMISSI
20220108013 - 17/064553 Favor; John G. ;   et al.
2022-04-07
PROCESSOR THAT MITIGATES SIDE CHANNEL ATTACKS BY PREVENTS CACHE LINE DATA IMPLICATED BY A MISSING LOAD ADDRESS FROM BEING FILLED INTO A DATA CACHE MEMORY WHEN THE LOAD ADDRESS SPECIFIES A LOCATION WITH NO VALID ADDRESS TRANSLATION OR NO PERMISSION TO READ FROM THE LOCATION
20220108012 - 17/064552 Favor; John G. ;   et al.
2022-04-07
PROCESSOR THAT MITIGATES SIDE CHANNEL ATTACKS BY PROVIDING RANDOM LOAD DATA AS A RESULT OF EXECUTION OF A LOAD OPERATION THAT DOES NOT HAVE PERMISSION TO ACCESS A LOAD ADDRESS
20220107784 - 17/064540 Favor; John G. ;   et al.
2022-04-07
PROCESSOR THAT MITIGATES SIDE CHANNEL ATTACKS BY PREVENTING CACHE MEMORY STATE FROM BEING AFFECTED BY A MISSING LOAD OPERATION BY INHIBITING OR CANCELING A FILL REQUEST OF THE LOAD OPERATION IF AN OLDER LOAD GENERATES A NEED FOR AN ARCHITECTURAL EXCEPTION
20220067156 - 17/004581 Favor; John G. ;   et al.
2022-03-03
PROCESSOR THAT MITIGATES SIDE CHANNEL ATTACKS BY PREVENTING ALL DEPENDENT INSTRUCTIONS FROM CONSUMING ARCHITECTURAL REGISTER RESULT PRODUCED BY INSTRUCTION THAT CAUSES A NEED FOR AN ARCHITECTURAL EXCEPTION
20220067155 - 17/204701 Favor; John G. ;   et al.
2022-03-03
Patent Grants & Applications
Trademark Applications
Mark Image

Registration | Serial
Trademark
Application Date
 VEYRON
"VEYRON"
97766705
VEYRON
2023-01-24
Company Registrations

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