loadpatents
name:-0.014378070831299
name:-0.0102379322052
name:-0.0009770393371582
Venkatraman; Siva Patent Filings

Venkatraman; Siva

Patent Applications and Registrations

Patent applications and USPTO patent grants for Venkatraman; Siva.The latest application filed is for "method and apparatus for reconfigurable memory".

Company Profile
0.7.9
  • Venkatraman; Siva - San Jose CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Method and apparatus for reconfigurable memory
Grant 7,502,977 - Venkatraman , et al. March 10, 2
2009-03-10
Method and apparatus for reconfigurable memory
Grant 7,490,260 - Venkatraman , et al. February 10, 2
2009-02-10
IC memory complex with controller for clusters of memory blocks I/O multiplexed using collar logic
Grant 7,318,115 - Kanapathippillai , et al. January 8, 2
2008-01-08
Unified shared pipeline allowing deactivation of RISC/DSP units for power saving
Grant 7,287,148 - Kanapathippillai , et al. October 23, 2
2007-10-23
Bus state keepers
Grant 7,233,166 - Kanapathippillai , et al. June 19, 2
2007-06-19
Method and apparatus for reconfigurable memory
Grant 7,111,190 - Venkatraman , et al. September 19, 2
2006-09-19
Method and apparatus for reconfigurable memory
App 20060010335 - Venkatraman; Siva ;   et al.
2006-01-12
Method and apparatus for reconfigurable memory
App 20050146910 - Venkatraman, Siva ;   et al.
2005-07-07
Unified instruction pipeline for power reduction in a digital signal processor integrated circuit
App 20050076194 - Kanapathippillai, Ruban ;   et al.
2005-04-07
Memory with memory clusters for power reduction in an integrated circuit
App 20040236896 - Kanapathippillai, Ruban ;   et al.
2004-11-25
Selectively multiplexing memory coupling global bus data bits to narrower functional unit coupling local bus
Grant 6,732,203 - Kanapathippillai , et al. May 4, 2
2004-05-04
Method and apparatus for power reduction in a digital signal processor integrated circuit
App 20040078608 - Kanapathippillai, Ruban ;   et al.
2004-04-22
Methods for power reduction in a digital signal processor integrated circuit
App 20040078612 - Kanapathippillai, Ruban ;   et al.
2004-04-22
Method and apparatus for power reduction in a digital signal processor integrated circuit
App 20040039952 - Kanapathippillai, Ruban ;   et al.
2004-02-26
Method and apparatus for power reduction in a digital signal processor integrated circuit
App 20030056134 - Kanapathippillai, Ruban ;   et al.
2003-03-20
Method and apparatus for reconfigurable memory
App 20020120826 - Venkatraman, Siva ;   et al.
2002-08-29

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.

© 2024 USPTO.report | Privacy Policy | Resources | RSS Feed of Trademarks | Trademark Filings Twitter Feed