| Patent | Date |
|---|
Rc Igbt
App 20210296479 - Pfirsch; Frank Dieter ; et al. | 2021-09-23 |
Method of forming an electrical contact and method of forming a chip package with a metal contact structure and protective layer
Grant 10,978,418 - Mahler , et al. April 13, 2 | 2021-04-13 |
Chip Package, Method Of Forming A Chip Package And Method Of Forming An Electrical Contact
App 20210082861 - Mahler; Joachim ; et al. | 2021-03-18 |
IGBT having a barrier region
Grant 10,930,772 - Philippou , et al. February 23, 2 | 2021-02-23 |
Method of Processing a Power Semiconductor Device
App 20210050436 - Vellei; Antonio ; et al. | 2021-02-18 |
IGBT with dV/dt Controllability
App 20210043759 - Philippou; Alexander ; et al. | 2021-02-11 |
Power semiconductor device having trench electrodes biased at three different electrical potentials, and method of manufacturing the same
Grant 10,910,487 - Philippou , et al. February 2, 2 | 2021-02-02 |
Method for producing IGBT with dV/dt controllability
Grant 10,854,739 - Vellei , et al. December 1, 2 | 2020-12-01 |
IGBT with dV/dt controllability
Grant 10,840,362 - Philippou , et al. November 17, 2 | 2020-11-17 |
Method for Producing IGBT with dV/dt Controllability
App 20200235232 - Vellei; Antonio ; et al. | 2020-07-23 |
Method for producing IGBT with dV/dt controllability
Grant 10,615,272 - Vellei , et al. | 2020-04-07 |
Trench transistor device
Grant 10,608,104 - Philippou , et al. | 2020-03-31 |
Chip Package And Method Of Forming A Chip Package With A Metal Contact Structure And Protective Layer, And Method Of Forming An
App 20200013749 - Mahler; Joachim ; et al. | 2020-01-09 |
IGBT Having a Barrier Region
App 20200006539 - Philippou; Alexander ; et al. | 2020-01-02 |
Chip package and method of forming a chip package with a metal contact structure and protective layer, and method of forming an electrical contact
Grant 10,461,056 - Mahler , et al. Oc | 2019-10-29 |
Power Semiconductor Device With Dv/dt Controllability
App 20190319122 - Philippou; Alexander ; et al. | 2019-10-17 |
IGBT with dV/dt controllability
Grant 10,439,055 - Philippou , et al. O | 2019-10-08 |
Power semiconductor device with dV/dt controllability through select trench electrode biasing, and method of manufacturing the same
Grant 10,347,754 - Philippou , et al. July 9, 2 | 2019-07-09 |
IGBT with dV/dt Controllability
App 20190123186 - Philippou; Alexander ; et al. | 2019-04-25 |
Method for Producing IGBT with dV/dt Controllability
App 20190123185 - Vellei; Antonio ; et al. | 2019-04-25 |
Bipolar transistor device with an emitter having two types of emitter regions
Grant 10,224,206 - Baburske , et al. | 2019-03-05 |
IGBT with dV/dt Controllability
App 20180286971 - Philippou; Alexander ; et al. | 2018-10-04 |
Power Semiconductor Device With Dv/dt Controllability
App 20180076309 - Philippou; Alexander ; et al. | 2018-03-15 |
Power semiconductor transistor having increased bipolar amplification
Grant 9,899,504 - Baburske , et al. February 20, 2 | 2018-02-20 |
Bipolar Transistor Device With an Emitter Having Two Types of Emitter Regions
App 20180012764 - Baburske; Roman ; et al. | 2018-01-11 |
Chip Package, Method Of Forming A Chip Package And Method Of Forming An Electrical Contact
App 20170338169 - Mahler; Joachim ; et al. | 2017-11-23 |
Bipolar transistor device with an emitter having two types of emitter regions
Grant 9,741,571 - Baburske , et al. August 22, 2 | 2017-08-22 |
Power Semiconductor Transistor Having Increased Bipolar Amplification
App 20170148904 - Baburske; Roman ; et al. | 2017-05-25 |
Method of manufacturing an insulated gate bipolar transistor with mesa sections between cell trench structures
Grant 9,653,568 - Laven , et al. May 16, 2 | 2017-05-16 |
Semiconductor device with auxiliary structure including deep level dopants
Grant 9,647,100 - Schulze , et al. May 9, 2 | 2017-05-09 |
Semiconductor device and insulated gate bipolar transistor with barrier structure
Grant 9,553,179 - Vellei , et al. January 24, 2 | 2017-01-24 |
Bipolar Transistor Device With an Emitter Having Two Types of Emitter Regions
App 20160284803 - Baburske; Roman ; et al. | 2016-09-29 |
Semiconductor Device with Auxiliary Structure Including Deep Level Dopants
App 20160111528 - Schulze; Hans-Joachim ; et al. | 2016-04-21 |
MOS-transistor with separated electrodes arranged in a trench
Grant 9,263,552 - Vellei February 16, 2 | 2016-02-16 |
MOS-Transistor with Separated Electrodes Arranged in a Trench
App 20150357437 - Vellei; Antonio | 2015-12-10 |
Trench Transistor Device
App 20150279985 - Philippou; Alexander ; et al. | 2015-10-01 |
Method of Manufacturing an Insulated Gate Bipolar Transistor with Mesa Sections Between Cell Trench Structures
App 20150270369 - Laven; Johannes Georg ; et al. | 2015-09-24 |
Semiconductor Device and Insulated Gate Bipolar Transistor with Barrier Structure
App 20150221756 - Vellei; Antonio ; et al. | 2015-08-06 |
Insulated gate bipolar transistor with mesa sections between cell trench structures and method of manufacturing
Grant 9,076,838 - Laven , et al. July 7, 2 | 2015-07-07 |
Insulated Gate Bipolar Transistor with Mesa Sections Between Cell Trench Structures and Method of Manufacturing
App 20150076554 - Laven; Johannes Georg ; et al. | 2015-03-19 |
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