Vasudevan; Nalini

Patent Applications and Registrations

Patent applications and USPTO patent grants for Vasudevan; Nalini.The latest application filed is for "systems, apparatuses, and methods for setting an output mask in a destination writemask register from a source write mask register using an input writemask and immediate".

Company Profile

1.20.34

Vasudevan; Nalini - Sunnyvale CA
Vasudevan; Nalini - New York NY

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Methods and systems to vectorize scalar computer program loops having loop-carried dependences Grant 10,402,177 - Bharadwaj , et al. Sep	2019-09-03
Systems, apparatuses, and methods for setting an output mask in a destination writemask register from a source write mask register using an input writemask and immediate Grant 10,372,450 - Lee , et al.	2019-08-06
Instruction to reduce elements in a vector register with strided access pattern Grant 9,921,832 - Hartono , et al. March 20, 2	2018-03-20
Systems, Apparatuses, And Methods For Setting An Output Mask In A Destination Writemask Register From A Source Write Mask Register Using An Input Writemask And Immediate App 20180067743 - LEE; Victor W. ; et al.	2018-03-08
Method and apparatus for approximating detection of overlaps between memory ranges Grant 9,910,650 - Hartono , et al. March 6, 2	2018-03-06
Loop vectorization methods and apparatus Grant 9,898,266 - Vasudevan , et al. February 20, 2	2018-02-20
Method And Apparatus For Speculative Vectorization App 20180018177 - VASUDEVAN; NALINI ; et al.	2018-01-18
Apparatus And Method For Propagating Conditionally Evaluated Values In Simd/vector Execution Using An Input Mask Register App 20180004517 - BHARADWAJ; Jayashankar ; et al.	2018-01-04
Methods And Systems To Vectorize Scalar Computer Program Loops Having Loop-carried Dependences App 20170322786 - Bharadwaj; Jayashankar ; et al.	2017-11-09
Apparatus and method for propagating conditionally evaluated values in SIMD/vector execution using an input mask register Grant 9,798,541 - Bharadwaj , et al. October 24, 2	2017-10-24
Methods and systems to vectorize scalar computer program loops having loop-carried dependences Grant 9,733,913 - Bharadwaj , et al. August 15, 2	2017-08-15
Automatic loop vectorization using hardware transactional memory Grant 9,720,667 - Baghsorkhi , et al. August 1, 2	2017-08-01
Method and apparatus for speculative vectorization Grant 9,710,279 - Vasudevan , et al. July 18, 2	2017-07-18
Systems, apparatuses, and methods for setting an output mask in a destination writemask register from a source write mask register using an input writemask and immediate Grant 9,703,558 - Lee , et al. July 11, 2	2017-07-11
Instruction and logic for cache-based speculative vectorization Grant 9,690,582 - Vasudevan , et al. June 27, 2	2017-06-27
Methods And Systems To Vectorize Scalar Computer Program Loops Having Loop-carried Dependences App 20160154638 - Bharadwaj; Jayashankar ; et al.	2016-06-02
Loop Vectorization Methods And Apparatus App 20160139897 - Vasudevan; Nalini ; et al.	2016-05-19
Method and Apparatus for Approximating Detection of Overlaps Between Memory Ranges App 20160092285 - Hartono; Albert ; et al.	2016-03-31
Method And Apparatus For Speculative Vectorization App 20160092234 - VASUDEVAN; NALINI ; et al.	2016-03-31
Methods and systems to vectorize scalar computer program loops having loop-carried dependences Grant 9,268,541 - Bharadwaj , et al. February 23, 2	2016-02-23
Apparatus and method for vectorization with speculation support Grant 9,268,626 - Bharadwaj , et al. February 23, 2	2016-02-23
Loop vectorization methods and apparatus Grant 9,244,677 - Vasudevan , et al. January 26, 2	2016-01-26
Speculative non-faulting loads and gathers Grant 9,189,236 - Bharadwaj , et al. November 17, 2	2015-11-17
Automatic Loop Vectorization Using Hardware Transactional Memory App 20150268940 - Baghsorkhi; Sara S. ; et al.	2015-09-24
Instruction and Logic for Cache-Based Speculative Vectorization App 20150186183 - VASUDEVAN; NALINI ; et al.	2015-07-02
Methods And Systems To Vectorize Scalar Computer Program Loops Having Loop-carried Dependences App 20150007154 - Bharadwaj; Jayashankar ; et al.	2015-01-01
Systems, Apparatuses, And Methods For Setting An Output Mask In A Destination Writemask Register From A Source Write Mask Register Using An Input Writemask And Immediate App 20140223139 - Lee; Victor W. ; et al.	2014-08-07
Instruction To Reduce Elements In A Vector Register With Strided Access Pattern App 20140189288 - Hartono; Albert ; et al.	2014-07-03
Apparatus And Method For Propagating Conditionally Evaluated Values In Simd/vector Execution App 20140189323 - Bharadwaj; Jayashankar ; et al.	2014-07-03
Speculative Non-faulting Loads And Gathers App 20140181580 - BHARADWAJ; Jayashankar ; et al.	2014-06-26
Loop Vectorization Methods And Apparatus App 20140096119 - VASUDEVAN; NALINI ; et al.	2014-04-03
Apparatus And Method For Detecting Identical Elements Within A Vector Register App 20140089634 - Lee; Victor W. ; et al.	2014-03-27
Apparatus And Method For Selecting Elements Of A Vector Computation App 20130332701 - Bharadwaj; Jayashankar ; et al.	2013-12-12
Apparatus And Method For Selecting Elements Of A Vector Computation App 20130311530 - Lee; Victor W. ; et al.	2013-11-21
Fast Biased Locks App 20120054394 - Namjoshi; Kedar S. ; et al.	2012-03-01

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