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Methods and apparatus for storing expanded width instructions in a VLIW memory for deferred execution
Grant 9,021,236 - Pechanek , et al. April 28, 2 | 2015-04-28 |
Methods and Apparatus for Storing Expanded Width Instructions in a VLIW Memory for Deferred Execution
App 20140173253 - Pechanek; Gerald G. ; et al. | 2014-06-19 |
Staging register file for use with multi-stage execution units
Grant 8,671,266 - Pechanek , et al. March 11, 2 | 2014-03-11 |
Methods and Apparatus for Storing Expanded Width Instructions in a VLIW Memory for Deferred Execution
App 20110225396 - Pechanek; Gerald George ; et al. | 2011-09-15 |
Methods and apparatus storing expanded width instructions in a VLIW memory deferred execution
Grant 7,962,723 - Pechanek , et al. June 14, 2 | 2011-06-14 |
Methods and Apparatus storing expanded width instructions in a VLIW memory for deferred execution
App 20090276576 - Pechanek; Gerald George ; et al. | 2009-11-05 |
Methods and apparatus for storing expanded width instructions in a VLIW memory for deferred execution
Grant 7,577,824 - Pechanek , et al. August 18, 2 | 2009-08-18 |
Determining a coverage mask for a pixel
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Method and a system for variable-length decoding, and a device for the localization of codewords
Grant 6,980,138 - Vassiliadis , et al. December 27, 2 | 2005-12-27 |
Methods and apparatus for general deferred execution processors
App 20050055539 - Pechanek, Gerald George ; et al. | 2005-03-10 |
Determining a coverage mask for a pixel
App 20040207642 - Crisu, Dan ; et al. | 2004-10-21 |
Method and a system for variable-length decoding, and a device for the localization of codewords
App 20040070525 - Vassiliadis, Stamatis ; et al. | 2004-04-15 |
Massively parallel array processor
Grant 6,405,185 - Pechanek , et al. June 11, 2 | 2002-06-11 |
Massively parallel multiple-folded clustered processor mesh array
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Method for processing instructions for parallel execution including storing instruction sequences along with compounding information in cache
Grant 6,029,240 - Blaner , et al. February 22, 2 | 2000-02-22 |
System for obtaining parallel execution of existing instructions in a particulr data processing configuration by compounding rules based on instruction categories
Grant 5,732,234 - Vassiliadis , et al. March 24, 1 | 1998-03-24 |
Massively parallel diagonal-fold tree array processor
Grant 5,682,544 - Pechanek , et al. October 28, 1 | 1997-10-28 |
Parallel processing system and method using surrogate instructions
Grant 5,649,135 - Pechanek , et al. July 15, 1 | 1997-07-15 |
Scalable parallel group partitioned diagonal-fold switching tree computing apparatus
Grant 5,640,586 - Pechanek , et al. June 17, 1 | 1997-06-17 |
Triangular scalable neural array processor
Grant 5,617,512 - Pechanek , et al. April 1, 1 | 1997-04-01 |
Learning machine synapse processor system apparatus
Grant 5,613,044 - Pechanek , et al. March 18, 1 | 1997-03-18 |
Processing element for parallel array processor
Grant 5,612,908 - Pechanek , et al. March 18, 1 | 1997-03-18 |
Status predictor for combined shifter-rotate/merge unit
Grant 5,590,348 - Phillips , et al. December 31, 1 | 1996-12-31 |
Parallel array processor interconnections
Grant 5,577,262 - Pechanek , et al. November 19, 1 | 1996-11-19 |
Triangular scalable neural array processor
Grant 5,542,026 - Pechanek , et al. July 30, 1 | 1996-07-30 |
Learning machine synapse processor system apparatus
Grant 5,517,596 - Pechanek , et al. May 14, 1 | 1996-05-14 |
Triangular scalable neural array processor
Grant 5,509,106 - Pechanek , et al. April 16, 1 | 1996-04-16 |
System for executing scalar instructions in parallel based on control bits appended by compounding decoder
Grant 5,504,932 - Vassiliadis , et al. April 2, 1 | 1996-04-02 |
System and method for obtaining parallel existing instructions in a particular data processing configuration by compounding instructions
Grant 5,502,826 - Vassiliadis , et al. March 26, 1 | 1996-03-26 |
Method of indicating parallel execution compoundability of scalar instructions based on analysis of presumed instructions
Grant 5,500,942 - Eickemeyer , et al. March 19, 1 | 1996-03-19 |
Cache store of instruction pairs with tags to indicate parallel execution
Grant 5,475,853 - Blaner , et al. December 12, 1 | 1995-12-12 |
Multi-function permutation switch for rotating and manipulating an order of bits of an input data byte in either cyclic or non-cyclic mode
Grant 5,471,628 - Phillips , et al. November 28, 1 | 1995-11-28 |
Compounding preprocessor for cache for identifying multiple instructions which may be executed in parallel
Grant 5,465,377 - Blaner , et al. November 7, 1 | 1995-11-07 |
Predecode instruction compounding
Grant 5,459,844 - Eickemeyer , et al. October 17, 1 | 1995-10-17 |
System for comounding instructions in a byte stream prior to fetching and identifying the instructions for execution
Grant 5,448,746 - Eickemeyer , et al. September 5, 1 | 1995-09-05 |
Address prediction to avoid address generation interlocks in computer systems
Grant 5,442,767 - Eickemeyer , et al. August 15, 1 | 1995-08-15 |
3-1 Arithmetic logic unit for simultaneous execution of an independent or dependent add/logic instruction pair
Grant 5,426,743 - Phillips , et al. * June 20, 1 | 1995-06-20 |
Apparatus for initializing branch prediction information
Grant 5,423,011 - Blaner , et al. June 6, 1 | 1995-06-06 |
Clustering fuzzy expected value system
Grant 5,414,797 - Vassiliadis , et al. May 9, 1 | 1995-05-09 |
Fuzzy reasoning database question answering system
Grant 5,384,894 - Vassiliadis , et al. January 24, 1 | 1995-01-24 |
Improved method to prefetch load instruction data
Grant 5,377,336 - Eickemeyer , et al. December 27, 1 | 1994-12-27 |
In-memory preprocessor for compounding a sequence of instructions for parallel computer system execution
Grant 5,355,460 - Eickemeyer , et al. October 11, 1 | 1994-10-11 |
SPIN: a sequential pipeline neurocomputer
Grant 5,337,395 - Vassiliadis , et al. August 9, 1 | 1994-08-09 |
Scalable flow virtual learning neurocomputer
Grant 5,329,611 - Pechanek , et al. July 12, 1 | 1994-07-12 |
Pyramid learning architecture neurocomputer
Grant 5,325,464 - Pechanek , et al. June 28, 1 | 1994-06-28 |
High performance array multiplier using four-to-two composite counters
Grant 5,303,176 - Hrusecky , et al. April 12, 1 | 1994-04-12 |
System for issuing instructions for parallel execution subsequent to branch into a group of member instructions with compoundability in dictation tag
Grant 5,303,356 - Vassiliadis , et al. April 12, 1 | 1994-04-12 |
Overflow determination for three-operand alus in a scalable compound instruction set machine which compounds two arithmetic instructions
Grant 5,301,341 - Vassiliadis , et al. April 5, 1 | 1994-04-05 |
High performance interlock collapsing SCISM ALU apparatus
Grant 5,299,319 - Vassiliadis , et al. March 29, 1 | 1994-03-29 |
Compounding preprocessor for cache for identifying multiple instructions which may be executed in parallel
Grant 5,295,249 - Blaner , et al. March 15, 1 | 1994-03-15 |
Virtual neurocomputer architectures for neural networks
Grant 5,243,688 - Pechanek , et al. September 7, 1 | 1993-09-07 |
Digital computer system capable of processing two or more instructions in parallel and having a coche and instruction compounding mechanism
Grant 5,214,763 - Blaner , et al. May 25, 1 | 1993-05-25 |
Memory management for scalable compound instruction set machines with in-memory compounding
Grant 5,197,135 - Eickemeyer , et al. March 23, 1 | 1993-03-23 |
Generalized 7/3 counters
Grant 5,187,679 - Vassiliadis , et al. February 16, 1 | 1993-02-16 |
Scalable neural array processor and method
Grant 5,148,515 - Vassiliadis , et al. September 15, 1 | 1992-09-15 |
Scalable neural array processor
Grant 5,146,543 - Vassiliadis , et al. September 8, 1 | 1992-09-08 |
Communicating adder tree system for neural array processor
Grant 5,146,420 - Vassiliadis , et al. September 8, 1 | 1992-09-08 |
High performance divider with a sequence of convergence factors
Grant 5,140,545 - Vassiliadis , et al. August 18, 1 | 1992-08-18 |
Orthogonal row-column neural processor
Grant 5,065,339 - Vassiliadis , et al. November 12, 1 | 1991-11-12 |
Data dependency collapsing hardware apparatus
Grant 5,051,940 - Vassiliadis , et al. September 24, 1 | 1991-09-24 |
Apparatus and method for prediction of zero arithmetic/logic results
Grant 4,947,359 - Vassiliadis , et al. August 7, 1 | 1990-08-07 |
Method and apparatus for modified carry-save determination of arithmetic/logic zero results
Grant 4,924,422 - Vassiliadis , et al. May 8, 1 | 1990-05-08 |
Overlapped multiple-bit scanning multiplication system with banded partial product matrix
Grant 4,918,639 - Schwarz , et al. April 17, 1 | 1990-04-17 |
Dynamic multiple instruction stream multiple data multiple pipeline apparatus for floating-point single instruction stream single data architectures
Grant 4,916,652 - Schwarz , et al. April 10, 1 | 1990-04-10 |
Apparatus for branch prediction for computer instructions
Grant 4,914,579 - Putrino , et al. April 3, 1 | 1990-04-03 |
High performance parallel binary byte adder
Grant 4,914,617 - Putrino , et al. April 3, 1 | 1990-04-03 |
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