Vashchenko; Vladislav

Patent Applications and Registrations

Patent applications and USPTO patent grants for Vashchenko; Vladislav.The latest application filed is for "esd clamp with auto biasing under high injection conditions".

Company Profile

1.158.33

Vashchenko; Vladislav - Palo Alto CA
Vashchenko; Vladislav - Fremont CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Integrated defibrillation pulse protector Grant 9,948,091 - Smith , et al. April 17, 2	2018-04-17
ESD clamp with auto biasing under high injection conditions Grant 9,543,296 - Vashchenko January 10, 2	2017-01-10
DMOS transistor with a slanted super junction drift structure Grant 8,878,295 - Hopper , et al. November 4, 2	2014-11-04
Ultra high voltage GaN ESD protection device Grant 8,785,973 - Vashchenko July 22, 2	2014-07-22
Esd Clamp With Auto Biasing Under High Injection Conditions App 20140034996 - Vashchenko; Vladislav	2014-02-06
High voltage MOS array with gate contact on extended drain region Grant 8,564,062 - Vashchenko October 22, 2	2013-10-22
ESD clamp with auto biasing under high injection conditions Grant 8,559,144 - Vashchenko , et al. October 15, 2	2013-10-15
High holding voltage BJT clamp with embedded reverse path protection in BCD process Grant 8,536,679 - Vashchenko September 17, 2	2013-09-17
High voltage tolerant SCR clamp with avalanche diode triggering circuit Grant 8,526,147 - Gallerano , et al. September 3, 2	2013-09-03
DMOS Transistor with a cavity that lies below the drift region Grant 8,524,548 - French , et al. September 3, 2	2013-09-03
EDS protection diode with pwell-nwell resurf Grant 8,497,167 - Vashchenko , et al. July 30, 2	2013-07-30
Low triggering voltage DIAC structure Grant 8,497,526 - Vashchenko , et al. July 30, 2	2013-07-30
High voltage tolerant, small footprint BJT-CMOS active clamp Grant 8,451,569 - Vashchenko May 28, 2	2013-05-28
Split-gate ESD diodes with elevated voltage tolerance Grant 8,405,123 - Vashchenko , et al. March 26, 2	2013-03-26
High-speed avalanche light emitting diode (ALED) and related apparatus and method Grant 8,344,394 - Vashchenko , et al. January 1, 2	2013-01-01
Photodiode That Incorporates A Charge Balanced Set Of Alternating N And P Doped Semiconductor Regions App 20120326260 - French; William ; et al.	2012-12-27
Galvanic isolation that incorporates a transformer with an optical link and that can be integrated onto a single semiconductor substrate Grant 8,324,603 - French , et al. December 4, 2	2012-12-04
Low side Zener reference voltage extended drain SCR clamps Grant 8,319,255 - Vashchenko November 27, 2	2012-11-27
DMOS Transistor with a Cavity that Lies Below the Drift Region App 20120273881 - French; William ; et al.	2012-11-01
CMOS ESD clamp with input and separate output voltage terminal for ESD protection Grant 8,299,531 - Vashchenko October 30, 2	2012-10-30
DMOS Transistor with a Slanted Super Junction Drift Structure App 20120261753 - Hopper; Peter J. ; et al.	2012-10-18
Electrostatic discharge (ESD) protection circuit and related apparatus and method Grant 8,284,530 - Vashchenko , et al. October 9, 2	2012-10-09
High voltage tolerant SCR clamp with avalanche diod triggering circuit App 20120250194 - Gallerano; Antonio ; et al.	2012-10-04
Fully silicon ALED-photodiode optical data link module Grant 8,237,177 - Vashchenko August 7, 2	2012-08-07
ESD clamp with auto biasing under high injection conditions App 20120176707 - Vashchenko; Vladislav ; et al.	2012-07-12
High voltage tolerant ESD device Grant 8,212,320 - Vashchenko , et al. July 3, 2	2012-07-03
Self protected snapback device driven by driver circuitry using high side pull-up avalanche diode App 20120154956 - Vashchenko; Vladislav ; et al.	2012-06-21
ESD clamp with auto biasing under high injection conditions App 20120153347 - Vashchenko; Vladislav	2012-06-21
Low triggering voltage DIAC structure App 20120091501 - Vashchenko; Vladislav ; et al.	2012-04-19
CDM-resilient high voltage ESD protection cell App 20120049241 - Vashchenko; Vladislav	2012-03-01
High holding voltage BJT clamp with embedded reverse path protection in BCD process App 20120049326 - Vashchenko; Vladislav	2012-03-01
Method of switching a magnetic MEMS switch Grant 8,098,121 - Hopper , et al. January 17, 2	2012-01-17
ESD self protecting NLDMOS device and NLDMOS array App 20120007140 - Vashchenko; Vladislav	2012-01-12
Fully silicon aled-photodiode optical data link module App 20120007105 - Vashchenko; Vladislav	2012-01-12
High voltage tolerant, small footprint BJT-CMOS active clamp App 20120007648 - Vashchenko; Vladislav	2012-01-12
Ultra high voltage GaN ESD protection device App 20110254012 - Vashchenko; Vladislav	2011-10-20
Power NLDMOS array with enhanced self-protection App 20110241109 - Vashchenko; Vladislav	2011-10-06
Low side zener reference voltage extended drain SCR clamps App 20110241069 - Vashchenko; Vladislav	2011-10-06
Galvanic Isolation That Incorporates A Transformer With An Optical Link And That Can Be Integrated Onto A Single Semiconductor Substrate App 20110174999 - French; William ; et al.	2011-07-21
ESD protection bipolar device with internal avalanche diode Grant 7,973,386 - Vashchenko , et al. July 5, 2	2011-07-05
High holding voltage LVTSCR-like structure Grant 7,943,958 - Vashchenko May 17, 2	2011-05-17
Lateral resurf NPN with high holding voltage for ESD applications Grant 7,935,605 - Vashchenko , et al. May 3, 2	2011-05-03
Compact dual direction BJT clamps Grant 7,932,582 - Vashchenko April 26, 2	2011-04-26
Method and structure for avoiding hot carrier degradation and soft leakage damage to ESD protection circuit Grant 7,929,262 - Vashchenko , et al. April 19, 2	2011-04-19
Snapback capable NLDMOS, DMOS and extended voltage NMOS devices Grant 7,915,678 - Vashchenko March 29, 2	2011-03-29
Fuse-type memory cells based on irreversible snapback device Grant 7,911,869 - Vashchenko , et al. March 22, 2	2011-03-22
Low side zener reference voltage extended drain SCR clamps Grant 7,910,951 - Vashchenko March 22, 2	2011-03-22
High voltage ESD LDMOS-SCR with gate reference voltage Grant 7,910,950 - Vashchenko , et al. March 22, 2	2011-03-22
Method Of Switching A Magnetic Mems Switch App 20100295638 - Hopper; Peter J. ; et al.	2010-11-25
Magnetic MEMS switching regulator Grant 7,839,242 - Hopper , et al. November 23, 2	2010-11-23
ESD protection device with controllable triggering characteristics using driver circuit related to power supply Grant 7,800,127 - Vashchenko , et al. September 21, 2	2010-09-21
On chip battery Grant 7,794,510 - Hopper , et al. September 14, 2	2010-09-14
ESD high frequency diodes Grant 7,795,102 - Vashchenko , et al. September 14, 2	2010-09-14
Current balancing in NPN BJT and BSCR snapback devices Grant 7,795,047 - Vashchenko , et al. September 14, 2	2010-09-14
Method of forming a SiGe DIAC ESD protection structure Grant 7,754,540 - Vashchenko , et al. July 13, 2	2010-07-13
Method of forming a silicon-based light-emitting structure Grant 7,754,505 - Hopper , et al. July 13, 2	2010-07-13
ESD clamps and NMOS arrays with increased electrical overstress robustness Grant 7,718,480 - Vashchenko , et al. May 18, 2	2010-05-18
Method of controlling the breakdown voltage of BSCRs and BJT clamps Grant 7,714,355 - Vashchenko , et al. May 11, 2	2010-05-11
Gated diode with increased voltage tolerance App 20100102390 - Vashchenko; Vladislav ; et al.	2010-04-29
Split-gate ESD diodes with elevated voltage tolerance App 20100102391 - Vashchenko; Vladislav ; et al.	2010-04-29
Programmable ESD protection structure Grant 7,705,403 - Vashchenko , et al. April 27, 2	2010-04-27
Integrated circuit with metal heat flow path coupled to transistor and method for manufacturing such circuit Grant 7,651,897 - Vashchenko , et al. January 26, 2	2010-01-26
Method of forming non-volatile memory (NVM) retention improvement utilizing protective electrical shield Grant 7,651,913 - Mirgorodski , et al. January 26, 2	2010-01-26
High holding voltage dual direction ESD clamp Grant 7,639,464 - Vashchenko , et al. December 29, 2	2009-12-29
Low side zener reference voltage extended drain SCR clamps App 20090315113 - Vashchenko; Vladislav	2009-12-24
High voltage MOS array with gate contact on extended drain region App 20090315110 - Vashchenko; Vladislav	2009-12-24
Compact dual direction BJT clamps App 20090315146 - Vashchenko; Vladislav	2009-12-24
Double gate NLDMOS SCR device with controllable switching characteristics Grant 7,635,614 - Kuznetsov , et al. December 22, 2	2009-12-22
Method of Forming a SiGe DIAC ESD Protection Structure App 20090162978 - Vashchenko; Vladislav ; et al.	2009-06-25
Method for forming heat sinks on silicon on insulator wafers Grant 7,528,012 - Hopper , et al. May 5, 2	2009-05-05
Vertical thyristor in complementary SiGe bipolar process Grant 7,521,310 - Vashchenko , et al. April 21, 2	2009-04-21
SiGe DIAC ESD protection structure Grant 7,514,751 - Vashchenko , et al. April 7, 2	2009-04-07
SiGe DIAC ESD protection structure App 20090032814 - Vashchenko; Vladislav ; et al.	2009-02-05
Method of forming a circuit having subsurface conductors Grant 7,479,435 - Hopper , et al. January 20, 2	2009-01-20
Silicon-based light-emitting structure Grant 7,462,874 - Hopper , et al. December 9, 2	2008-12-09
Method of forming a vertical MOS transistor Grant 7,435,628 - Hopper , et al. October 14, 2	2008-10-14
Method of forming a BJT with ESD self protection Grant 7,422,952 - Vashchenko , et al. September 9, 2	2008-09-09
Non-volatile memory (NVM) retention improvement utilizing protective electrical shield App 20080213959 - Mirgorodski; Yuri ; et al.	2008-09-04
Self protecting NLDMOS, DMOS and extended voltage NMOS devices Grant 7,411,251 - Vashchenko August 12, 2	2008-08-12
Dual direction ESD clamp based on snapback NMOS cell with embedded SCR Grant 7,394,133 - Vashchenko , et al. July 1, 2	2008-07-01
Method of forming a silicon controlled rectifier structure with improved punch through resistance Grant 7,387,918 - Vashchenko , et al. June 17, 2	2008-06-17
ESD protection circuit with a low snapback voltage that is protected from fast non-ESD voltage spikes and ripples Grant 7,379,283 - Farrenkopf , et al. May 27, 2	2008-05-27
Programming of fuse-based memories using snapback devices Grant 7,375,579 - Vashchenko , et al. May 20, 2	2008-05-20
Non-volatile memory (NVM) retention improvement utilizing protective electrical shield Grant 7,375,393 - Mirgorodski , et al. May 20, 2	2008-05-20
Non-volatile memory structure and erase method with floating gate voltage control Grant 7,339,835 - Mirgorodski , et al. March 4, 2	2008-03-04
Integrated Circuit with Metal Heat Flow Path Coupled to Transistor and Method for Manufacturing Such Circuit App 20080032467 - Vashchenko; Vladislav ; et al.	2008-02-07
Multistage snapback ESD protection network Grant 7,298,599 - Vashchenko , et al. November 20, 2	2007-11-20
Reducing cross die variability in an EEPROM array Grant 7,298,653 - Hopper , et al. November 20, 2	2007-11-20
Low reference voltage ESD protection device Grant 7,285,805 - Vashchenko , et al. October 23, 2	2007-10-23
ESD protection cell with active pwell resistance control Grant 7,268,398 - Vashchenko , et al. September 11, 2	2007-09-11
Vertical MOS transistor Grant 7,259,411 - Hopper , et al. August 21, 2	2007-08-21
Method of forming a high-voltage silicon controlled rectifier structure with improved punch through resistance Grant 7,238,553 - Vashchenko , et al. July 3, 2	2007-07-03
BJT with ESD self protection Grant 7,221,036 - Vashchenko , et al. May 22, 2	2007-05-22
Single NMOS device memory cell and array Grant 7,221,608 - Vashchenko , et al. May 22, 2	2007-05-22
Imaging cell that has a long integration period and method of operating the imaging cell Grant 7,218,555 - Hopper , et al. May 15, 2	2007-05-15
Self-protecting transistor array Grant 7,217,966 - Vashchenko , et al. May 15, 2	2007-05-15
Laser powered integrated circuit Grant 7,209,503 - Hopper , et al. April 24, 2	2007-04-24
Ultra low leakage MOSFET transistor Grant 7,202,538 - Hopper , et al. April 10, 2	2007-04-10
Cascoded bi-directional high voltage ESD protection structure Grant 7,196,361 - Vashchenko , et al. March 27, 2	2007-03-27
Source capacitor enhancement for improved dynamic IR drop prevention App 20070066002 - Hopper; Peter J. ; et al.	2007-03-22
ESD protection cluster and method of providing multi-port ESD protection Grant 7,193,251 - Vashchenko , et al. March 20, 2	2007-03-20
Method of improving the breakdown voltage of a diffused semiconductor junction Grant 7,192,853 - Strachan , et al. March 20, 2	2007-03-20
Method of forming a semiconductor structure with non-uniform metal widths Grant 7,192,857 - Hopper , et al. March 20, 2	2007-03-20
Method and structure for addressing hot carrier degradation in high voltage devices Grant 7,180,133 - Vashchenko , et al. February 20, 2	2007-02-20
Laser powered clock circuit with a substantially reduced clock skew Grant 7,180,379 - Hopper , et al. February 20, 2	2007-02-20
Substrate independent multiple input bi-directional ESD protection structure Grant 7,145,187 - Vashchenko , et al. December 5, 2	2006-12-05
Snapback clamp having low triggering voltage for ESD protection Grant 7,141,831 - Vashchenko , et al. November 28, 2	2006-11-28
Silicon controlled rectifier structures with reduced turn on times Grant 7,126,168 - Vashchenko , et al. October 24, 2	2006-10-24
Apparatus and method for forming heat sinks on silicon on insulator wafers Grant 7,119,431 - Hopper , et al. October 10, 2	2006-10-10
Low triggering voltage ESD protection structure and method for reducing the triggering voltage Grant 7,115,951 - Vashchenko , et al. October 3, 2	2006-10-03
NVM PMOS-cell with one erased and two programmed states Grant 7,113,427 - Mirgorodski , et al. September 26, 2	2006-09-26
Vertical photodiode with heavily-doped regions of alternating conductivity types Grant 7,105,373 - Hopper , et al. September 12, 2	2006-09-12
Low area linear time-driver circuit Grant 7,075,341 - Vashchenko , et al. July 11, 2	2006-07-11
Method of forming a varactor with an increased linear tuning range Grant 7,067,384 - Vashchenko , et al. June 27, 2	2006-06-27
Electrostatic discharge (ESD) protection structure Grant 7,067,852 - Vashchenko , et al. June 27, 2	2006-06-27
Silicon controlled rectifier structure with improved punch through resistance Grant 7,064,397 - Vashchenko , et al. June 20, 2	2006-06-20
PMOS based LVTSCR and IGBT-like structure Grant 7,057,215 - Vashchenko , et al. June 6, 2	2006-06-06
Avalanche diode with breakdown voltage controlled by gate length Grant 7,056,761 - Vashchenko , et al. June 6, 2	2006-06-06
Electrostatic discharge (ESD) protection clamp circuitry Grant 7,057,867 - Vashchenko , et al. June 6, 2	2006-06-06
High-speed photon detector and method of forming the detector Grant 7,057,174 - Hopper , et al. June 6, 2	2006-06-06
LVTSCR charge pump converter circuit Grant 7,050,314 - Vashchenko , et al. May 23, 2	2006-05-23
Single mask control of doping levels Grant 7,037,814 - Vashchenko , et al. May 2, 2	2006-05-02
High voltage tolerant electrostatic discharge (ESD) protection clamp circuitry Grant 7,027,277 - Vashchenko , et al. April 11, 2	2006-04-11
Stacked high-voltage ESD protection clamp with triggering voltage circuit control Grant 7,027,278 - Vashchenko , et al. April 11, 2	2006-04-11
Complementary vertical SCRs for SOI and triple well processes Grant 7,023,029 - Vashchenko , et al. April 4, 2	2006-04-04
Method of making spin-injection devices on silicon material for conventional BiCMOS technology Grant 7,022,532 - Vashchenko , et al. April 4, 2	2006-04-04
Method of forming through-the-wafer metal interconnect structures Grant 7,005,388 - Hopper , et al. February 28, 2	2006-02-28
Imaging cell that has a long integration period and method of operating the imaging cell App 20060027845 - Hopper; Peter J. ; et al.	2006-02-09
Programming method for nonvolatile memory cell Grant 6,985,386 - Mirgorodski , et al. January 10, 2	2006-01-10
Retention improvement technique for one time programmable non-volatile memory Grant 6,982,907 - Mirgorodski , et al. January 3, 2	2006-01-03
Imaging cell that has a long integration period and method of operating the imaging cell Grant 6,972,457 - Hopper , et al. December 6, 2	2005-12-06
Imaging cell with a non-volatile memory that provides a long integration period and method of operating the imaging cell Grant 6,972,995 - Hopper , et al. December 6, 2	2005-12-06
LVTSCR ESD protection clamp with dynamically controlled blocking junction Grant 6,970,335 - Vashchenko , et al. November 29, 2	2005-11-29
Method of etching a lateral trench under an extrinsic base and improved bipolar transistor Grant 6,964,907 - Hopper , et al. November 15, 2	2005-11-15
Spin-injection devices on silicon material for conventional BiCMOS technology Grant 6,963,091 - Vashchenko , et al. November 8, 2	2005-11-08
Spin-polarization of carriers in semiconductor materials for spin-based microelectronic devices Grant 6,956,269 - Vashchenko , et al. October 18, 2	2005-10-18
ESD protection snapback structure for overvoltage self-protecting I/O cells Grant 6,952,039 - Vashchenko , et al. October 4, 2	2005-10-04
Method of erasing an EEPROM cell utilizing a frequency/time domain based erased signal Grant 6,947,331 - Mirgorodski , et al. September 20, 2	2005-09-20
High holding voltage ESD protection structure and method Grant 6,946,690 - Vashchenko , et al. September 20, 2	2005-09-20
Integrated trim structure utilizing dynamic doping Grant 6,940,133 - Hopper , et al. September 6, 2	2005-09-06
Power transistor structure with non-uniform metal widths Grant 6,933,562 - Hopper , et al. August 23, 2	2005-08-23
High performance SCR-like BJT ESD protection structure Grant 6,933,588 - Vashchenko , et al. August 23, 2	2005-08-23
High-voltage silicon controlled rectifier structure with improved punch through resistance Grant 6,919,588 - Vashchenko , et al. July 19, 2	2005-07-19
LVTSCR with compact design Grant 6,911,679 - Vashchenko , et al. June 28, 2	2005-06-28
Electrostatic discharge (ESD) protection structure with symmetrical positive and negative ESD protection Grant 6,906,357 - Vashchenko , et al. June 14, 2	2005-06-14
Method of PMOS stacked-gate memory cell programming enhancement utilizing stair-like pulses of control gate voltage Grant 6,903,978 - Mirgorodski , et al. June 7, 2	2005-06-07
Efficient method of PMOS stacked-gate memory cell programming utilizing feedback control of substrate current Grant 6,903,979 - Mirgorodski , et al. June 7, 2	2005-06-07
ESD protection methods and devices using additional terminal in the diode structures Grant 6,894,881 - Vashchenko , et al. May 17, 2	2005-05-17
Semiconductor interconnect and method of providing interconnect using a contact region Grant 6,864,582 - Vashchenko , et al. March 8, 2	2005-03-08
Non-volatile memory cell with gated diode and MOS transistor and method for using such cell Grant 6,862,216 - Hopper , et al. March 1, 2	2005-03-01
High-speed photon detector and no cost method of forming the detector Grant 6,855,968 - Hopper , et al. February 15, 2	2005-02-15
Low-cost method of forming a color imager Grant 6,852,562 - Hopper , et al. February 8, 2	2005-02-08
BJT based ESD protection structure with improved current stability Grant 6,853,053 - Vashchenko , et al. February 8, 2	2005-02-08
Circuit and method of forming the circuit having subsurface conductors Grant 6,844,585 - Hopper , et al. January 18, 2	2005-01-18
Self protecting bipolar SCR Grant 6,841,829 - Vashchenko , et al. January 11, 2	2005-01-11
High holding voltage LVTSCR Grant 6,822,294 - Vashchenko , et al. November 23, 2	2004-11-23
High-voltage silicon controlled rectifier structure Grant 6,815,732 - Vashchenko , et al. November 9, 2	2004-11-09
Low cost, high density diffusion diode-capacitor Grant 6,798,641 - Hopper , et al. September 28, 2	2004-09-28
Direct implantation of fluorine into the channel region of a PMOS device Grant 6,797,555 - Hopper , et al. September 28, 2	2004-09-28
Bi-directional ESD protection structure for BiCMOS technology Grant 6,784,029 - Vashchenko , et al. August 31, 2	2004-08-31
Bipolar transistor-based electrostatic discharge (ESD) protection structure with a heat sink Grant 6,777,784 - Vashchenko , et al. August 17, 2	2004-08-17
LVTSCR-like structure with internal emitter injection control Grant 6,720,624 - Vashchenko , et al. April 13, 2	2004-04-13
High holding voltage ESD protection structure for BiCMOS technology Grant 6,717,219 - Vashchenko , et al. April 6, 2	2004-04-06
Method of providing semiconductor interconnects using silicide exclusion Grant 6,707,117 - Vashchenko , et al. March 16, 2	2004-03-16
Low voltage complement ESD protection structures Grant 6,690,069 - Vashchenko , et al. February 10, 2	2004-02-10
Stable BJT electrostatic discharge protection clamp Grant 6,667,867 - Vashchenko , et al. December 23, 2	2003-12-23
Stand-alone triggering structure for ESD protection of high voltage CMOS Grant 6,660,602 - Vashchenko , et al. December 9, 2	2003-12-09
Varactor and method of forming a varactor with an increased linear tuning range Grant 6,653,716 - Vashchenko , et al. November 25, 2	2003-11-25
Wedge-shaped high density capacitor and method of making the capacitor Grant 6,639,784 - Hopper , et al. October 28, 2	2003-10-28
Electrostatic discharge (ESD) protection circuit Grant 6,560,081 - Vashchenko , et al. May 6, 2	2003-05-06
Compact ballasting region design for snapback N-MOS ESD protection structure using multiple local N+ region blocking Grant 6,559,507 - Vashchenko , et al. May 6, 2	2003-05-06
ESD protection clamp with internal zener diode Grant 6,548,868 - Tsuei , et al. April 15, 2	2003-04-15
Triac with a holding voltage that is greater than the dc bias voltages that are on the to-be-protected nodes Grant 6,541,801 - Vashchenko , et al. April 1, 2	2003-04-01
Adjustable electrostatic discharge protection clamp Grant 6,492,859 - Vashchenko , et al. December 10, 2	2002-12-10
LVTSCR with a holding voltage that is greater than a DC bias voltage on a to-be-protected node Grant 6,433,368 - Vashchenko , et al. August 13, 2	2002-08-13
Adjustable Electrostatic Discharge Protection Clamp App 20020097082 - Vashchenko, Vladislav ; et al.	2002-07-25
Stable BJT electrostatic discharge protection clamp App 20020097544 - Vashchenko, Vladislav ; et al.	2002-07-25
Diode junction based electrostatic discharge (ESD) protection structure App 20020079540 - Vashchenko, Vladislav ; et al.	2002-06-27
MOSFET-based electrostatic discharge (ESD) protection structure with a floating heat sink Grant 6,407,445 - Vashchenko , et al. June 18, 2	2002-06-18
Gate electrode controllable electrostatic discharge (ESD) protection structure having a MOSFET with source and drain regions in separate wells Grant 6,355,959 - Vashchenko , et al. March 12, 2	2002-03-12

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