VanStee; Dustin J.

Patent Applications and Registrations

Patent applications and USPTO patent grants for VanStee; Dustin J..The latest application filed is for "performance evaluation of solid state memory device".

Company Profile

1.27.30

VanStee; Dustin J. - Poughkeepsie NY
Vanstee; Dustin J. - Poughkeespie NY

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Performance evaluation of solid state memory device Grant 11,158,394 - Griffin , et al. October 26, 2	2021-10-26
Performance Evaluation Of Solid State Memory Device App 20200234783 - Griffin; Thomas J. ; et al.	2020-07-23
Performance evaluation of solid state memory device Grant 10,658,059 - Griffin , et al.	2020-05-19
Performance Evaluation Of Solid State Memory Device App 20170032847 - Griffin; Thomas J. ; et al.	2017-02-02
Performance evaluation of solid state memory device Grant 9,524,800 - Griffin , et al. December 20, 2	2016-12-20
Solid state memory device logical and physical partitioning Grant 9,495,289 - Griffin , et al. November 15, 2	2016-11-15
Solid state memory device logical and physical partitioning Grant 9,495,287 - Griffin , et al. November 15, 2	2016-11-15
Flash interface error injector Grant 9,159,458 - Griffin , et al. October 13, 2	2015-10-13
Flash interface error injector Grant 9,047,988 - Griffin , et al. June 2, 2	2015-06-02
Bit error rate based wear leveling for solid state drive memory Grant 9,015,537 - Griffin , et al. April 21, 2	2015-04-21
Service channel for connecting a host computer to peripheral devices Grant 9,003,068 - Cadigan , et al. April 7, 2	2015-04-07
Bit error rate based wear leveling for solid state drive memory Grant 8,832,506 - Griffin , et al. September 9, 2	2014-09-09
Flash Interface Error Injector App 20140143618 - Griffin; Thomas J. ; et al.	2014-05-22
Flash Interface Error Injector App 20140143617 - Griffin; Thomas J. ; et al.	2014-05-22
Bit Error Rate Based Wear Leveling For Solid State Drive Memory App 20140101499 - Griffin; Thomas J. ; et al.	2014-04-10
Solid State Memory Device Logical And Physical Partitioning App 20140095773 - Griffin; Thomas J. ; et al.	2014-04-03
Performance Evaluation Of Solid State Memory Device App 20140088920 - Griffin; Thomas J. ; et al.	2014-03-27
Solid State Memory Device Logical And Physical Partitioning App 20140089629 - Griffin; Thomas J. ; et al.	2014-03-27
Service Channel For Connecting A Host Computer To Peripheral Devices App 20140019646 - Cadigan; David D. ; et al.	2014-01-16
Flash array built in self test engine with trace array and flash metric reporting Grant 8,627,158 - Cadigan , et al. January 7, 2	2014-01-07
Optimizing Write Performance To Flash Memory App 20130339573 - Anderson; Clark A. ; et al.	2013-12-19
Bit Error Rate Based Wear Leveling For Solid State Drive Memory App 20130191700 - Griffin; Thomas J. ; et al.	2013-07-25
Flash Array Built In Self Test Engine With Trace Array And Flash Metric Reporting App 20130151914 - Cadigan; David D. ; et al.	2013-06-13
Solid state drive with adjustable drive life and capacity Grant 8,214,580 - Lucas , et al. July 3, 2	2012-07-03
System and method for providing voltage power gating Grant 8,015,426 - VanStee , et al. September 6, 2	2011-09-06
Systems for providing performance monitoring in a memory system Grant 7,984,222 - Gower , et al. July 19, 2	2011-07-19
System and method for providing a configurable command sequence for a memory interface device Grant 7,979,616 - Bravo , et al. July 12, 2	2011-07-12
Solid state drive with flash sparing Grant 7,954,021 - Lucas , et al. May 31, 2	2011-05-31
Solid State Drive with Adjustable Drive Life and Capacity App 20110099320 - Lucas; Gregg S. ; et al.	2011-04-28
Solid State Drive With Flash Sparing App 20110099419 - Lucas; Gregg S. ; et al.	2011-04-28
Systems and methods for providing collision detection in a memory system Grant 7,669,086 - Gower , et al. February 23, 2	2010-02-23
System and method for providing synchronous dynamic random access memory (SDRAM) mode register shadowing in a memory system Grant 7,624,225 - Gower , et al. November 24, 2	2009-11-24
Systems and methods for providing a dynamic memory bank page policy Grant 7,606,988 - Gower , et al. October 20, 2	2009-10-20
Systems and methods for providing dynamic memory pre-fetch Grant 7,603,526 - VanStee , et al. October 13, 2	2009-10-13
System And Method For Providing Voltage Power Gating App 20090245008 - VanStee; Dustin J. ; et al.	2009-10-01
Systems For Providing Performance Monitoring In A Memory System App 20090119466 - Gower; Kevin C. ; et al.	2009-05-07
Systems and methods for providing performance monitoring in a memory system Grant 7,493,439 - Gower , et al. February 17, 2	2009-02-17
System And Method For Providing A Configurable Command Sequence For A Memory Interface Device App 20080320191 - Bravo; Elianne A. ; et al.	2008-12-25
System And Method For Providing Synchronous Dynamic Random Access Memory (sdram) Mode Register Shadowing In A Memory System App 20080235444 - Gower; Kevin C. ; et al.	2008-09-25
Systems And Methods For Providing Dynamic Memory Pre-fetch App 20080183903 - VanStee; Dustin J. ; et al.	2008-07-31
Systems And Methods For Providing A Dynamic Memory Bank Page Policy App 20080183977 - Gower; Kevin C. ; et al.	2008-07-31
Systems And Methods For Providing Collision Detection In A Memory System App 20080115137 - Gower; Kevin C. ; et al.	2008-05-15
Systems And Methods For Providing Performance Monitoring In A Memory System App 20080034148 - Gower; Kevin C. ; et al.	2008-02-07
Fixed latency data computation and chip crossing circuits and methods for synchronous input to output protocol translator supporting multiple reference oscillator frequencies Grant 7,290,159 - Lamb , et al. October 30, 2	2007-10-30
Memory built-in self test engine apparatus and method with trigger on failure and multiple patterns per load capability Grant 7,181,659 - Bravo , et al. February 20, 2	2007-02-20
Memory built-in self test engine apparatus and method with trigger on failure and multiple patterns per load capability App 20060179369 - Bravo; Elianne A. ; et al.	2006-08-10
System, method and storage medium for providing programmable delay chains for a memory system App 20060164909 - Gower; Kevin C. ; et al.	2006-07-27
Fixed latency data computation and chip crossing circuits and methods for synchronous input to output protocol translator supporting multiple reference oscillator frequencies App 20050268135 - Lamb, Kirk D. ; et al.	2005-12-01
DDR-II driver impedance adjustment control algorithm and interface circuits Grant 6,807,650 - Lamb , et al. October 19, 2	2004-10-19
DDR-II driver impedance adjustment control algorithm and interface circuits App 20030223303 - Lamb, Kirk D. ; et al.	2003-12-04

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.