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Compaction Of Architected Registers In A Simultaneous Multithreading Processor
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Redistribution of architected states for a processor register file
Grant 11,144,319 - Battle , et al. October 12, 2 | 2021-10-12 |
Prioritized instructions in an instruction completion table of a simultaneous multithreading processor
Grant 11,068,274 - Ward , et al. July 20, 2 | 2021-07-20 |
Issue queue snooping for asynchronous flush and restore of distributed history buffer
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Handling unaligned load operations in a multi-slice computer processor
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Most favored branch issue
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Variable latency flush filtering
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Multi-level history buffer for transaction memory in a microprocessor
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Multiple Level History Buffer for Transaction Memory Support
App 20200019405 - Battle; Steven J. ; et al. | 2020-01-16 |
Most Favored Branch Issue
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Blocking instruction fetching in a computer processor
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Handling Unaligned Load Operations In A Multi-slice Computer Processor
App 20190384602 - CHADHA; SUNDEEP ; et al. | 2019-12-19 |
Handling unaligned load operations in a multi-slice computer processor
Grant 10,496,406 - Chadha , et al. De | 2019-12-03 |
Identifying an effective address (EA) using an interrupt instruction tag (ITAG) in a multi-slice processor
Grant 10,467,008 - Levitan , et al. No | 2019-11-05 |
Handling Unaligned Load Operations In A Multi-slice Computer Processor
App 20190286446 - CHADHA; SUNDEEP ; et al. | 2019-09-19 |
Handling unaligned load operations in a multi-slice computer processor
Grant 10,409,598 - Chadha , et al. Sept | 2019-09-10 |
Thread migration using a microcode engine of a multi-slice processor
Grant 10,387,154 - Bishop , et al. A | 2019-08-20 |
Hardware based isolation for secure execution of virtual machines
Grant 10,387,686 - Boivie , et al. A | 2019-08-20 |
Asynchronous flush and restore of distributed history buffer
Grant 10,379,867 - Terry , et al. A | 2019-08-13 |
Variable Latency Flush Filtering
App 20190227806 - KINCAID; GLENN O. ; et al. | 2019-07-25 |
Techniques for predicting a target address of an indirect branch instruction
Grant 10,353,710 - Eickemeyer , et al. July 16, 2 | 2019-07-16 |
Prioritized Instructions In An Instruction Completion Table Of A Simultaneous Multithreading Processor
App 20190187992 - WARD; Kenneth L. ; et al. | 2019-06-20 |
Issue Queue Snooping For Asynchronous Flush And Restore Of Distributed History Buffer
App 20190188133 - TERRY; David R. ; et al. | 2019-06-20 |
Asynchronous Flush And Restore Of Distributed History Buffer
App 20190187995 - TERRY; David R. ; et al. | 2019-06-20 |
Managing an effective address table in a multi-slice processor
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Managing an effective address table in a multi-slice processor
Grant 10,241,905 - Giri , et al. | 2019-03-26 |
Hardware Based Isolation For Secure Execution Of Virtual Machines
App 20190034666 - Boivie; Richard H. ; et al. | 2019-01-31 |
Out-of-order processor that avoids deadlock in processing queues by designating a most favored instruction
Grant 10,169,046 - Boersma , et al. J | 2019-01-01 |
Multi-level History Buffer For Transaction Memory In A Microprocessor
App 20180336037 - BARRICK; Brian D. ; et al. | 2018-11-22 |
Handling Unaligned Load Operations In A Multi-slice Computer Processor
App 20180300136 - CHADHA; SUNDEEP ; et al. | 2018-10-18 |
Handling Unaligned Load Operations In A Multi-slice Computer Processor
App 20180300135 - CHADHA; SUNDEEP ; et al. | 2018-10-18 |
Managing A Divided Load Reorder Queue
App 20180260230 - EICKEMEYER; RICHARD J. ; et al. | 2018-09-13 |
Handling unaligned load operations in a multi-slice computer processor
Grant 10,073,697 - Chadha , et al. September 11, 2 | 2018-09-11 |
Handling unaligned load operations in a multi-slice computer processor
Grant 10,067,763 - Chadha , et al. September 4, 2 | 2018-09-04 |
Managing a divided load reorder queue
Grant 10,042,647 - Eickemeyer , et al. August 7, 2 | 2018-08-07 |
Out-of-order Processor That Avoids Deadlock In Processing Queues By Designating A Most Favored Instruction
App 20180121205 - Boersma; Maarten J. ; et al. | 2018-05-03 |
Administering Instruction Tags In A Computer Processor
App 20180004516 - FEISTE; KURT A. ; et al. | 2018-01-04 |
Managing A Divided Load Reorder Queue
App 20170371658 - EICKEMEYER; RICHARD J. ; et al. | 2017-12-28 |
Managing An Effective Address Table In A Multi-slice Processor
App 20170344378 - GIRI; AKASH V. ; et al. | 2017-11-30 |
Managing An Effective Address Table In A Multi-slice Processor
App 20170344469 - GIRI; AKASH V. ; et al. | 2017-11-30 |
Identifying An Effective Address (ea) Using An Interrupt Instruction Tag (itag) In A Multi-slice Processor
App 20170344368 - LEVITAN; DAVID S. ; et al. | 2017-11-30 |
Techniques For Predicting A Target Address Of An Indirect Branch Instruction
App 20170315810 - EICKEMEYER; RICHARD J. ; et al. | 2017-11-02 |
Out-of-order processor that avoids deadlock in processing queues by designating a most favored instruction
Grant 9,798,549 - Boersma , et al. October 24, 2 | 2017-10-24 |
Techniques For Restoring Previous Values To Registers Of A Processor Register File
App 20170277535 - LE; HUNG Q. ; et al. | 2017-09-28 |
Thread Migration Using A Microcode Engine Of A Multi-slice Processor
App 20170262281 - BISHOP; JAMES W. ; et al. | 2017-09-14 |
Blocking Instruction Fetching In A Computer Processor
App 20170262286 - HICKERSON; BRYAN G. ; et al. | 2017-09-14 |
Handling Unaligned Load Operations In A Multi-slice Computer Processor
App 20170168823 - CHADHA; SUNDEEP ; et al. | 2017-06-15 |
Handling Unaligned Load Operations In A Multi-slice Computer Processor
App 20170168945 - CHADHA; SUNDEEP ; et al. | 2017-06-15 |
Virtual machine backup
Grant 9,519,502 - Guthrie , et al. December 13, 2 | 2016-12-13 |
Virtual Machine Backup
App 20150378770 - Guthrie; Guy L. ; et al. | 2015-12-31 |
Virtual Machine Backup
App 20150143055 - Guthrie; Guy L. ; et al. | 2015-05-21 |
Issue unit for placing a processor into a gradual slow mode of operation
Grant 8,200,946 - Abernathy , et al. June 12, 2 | 2012-06-12 |
Tracking effective addresses in an out-of-order processor
Grant 8,131,976 - Doing , et al. March 6, 2 | 2012-03-06 |
Processor livelock recovery by gradual stalling of instruction processing rate during detection of livelock condition
Grant 7,818,544 - Abernathy , et al. October 19, 2 | 2010-10-19 |
Tracking Effective Addresses in an Out-of-Order Processor
App 20100262806 - Doing; Richard W. ; et al. | 2010-10-14 |
Detecting and Handling Short Forward Branch Conversion Candidates
App 20100262813 - Brown; Mary D. ; et al. | 2010-10-14 |
Techniques for reducing power requirements of an integrated circuit
Grant 7,605,612 - Chiang , et al. October 20, 2 | 2009-10-20 |
Issue Unit for Placing a Processor into a Gradual Slow Mode of Operation
App 20090006820 - Abernathy; Christopher M. ; et al. | 2009-01-01 |
Mechanisms for Placing a Processor into a Gradual Slow Mode of Operation
App 20090006817 - Abernathy; Christopher M. ; et al. | 2009-01-01 |
Issue unit for placing a processor into a gradual slow mode of operation in response to a detected livelock condition within a processor pipeline
Grant 7,437,539 - Abernathy , et al. October 14, 2 | 2008-10-14 |
Placing a processor into a gradual slow mode of operation in response to a detected livelock condition within a processor pipeline
Grant 7,434,033 - Abernathy , et al. October 7, 2 | 2008-10-07 |
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