van Ginneken; Lukas P. P. P.
Patent Applications and Registrations
Patent applications and USPTO patent grants for van Ginneken; Lukas P. P. P..The latest application filed is for "timing closure methodology including placement with initial delay values".
- van Ginneken; Lukas P. P. P. - Clyde Hill WA
- Van Ginneken; Lukas P.P.P. - San Jose CA
- van Ginneken; Lukas P. P. P. - Baldwin Place NY
| Patent | Date |
|---|---|
| Timing closure methodology including placement with initial delay values Grant 9,811,624 - van Ginneken , et al. November 7, 2 | 2017-11-07 |
| Timing Closure Methodology Including Placement with Initial Delay Values App 20140109034 - van Ginneken; Lukas P.P.P. ; et al. | 2014-04-17 |
| Timing closure methodology including placement with initial delay values Grant 8,621,403 - van Ginneken , et al. December 31, 2 | 2013-12-31 |
| Method For Storing Multiple Levels Of Design Data In A Common Database App 20080209364 - Van Ginneken; Lukas P.P.P. ; et al. | 2008-08-28 |
| Method for storing multiple levels of design data in a common database App 20060117279 - Van Ginneken; Lukas P.P.P. ; et al. | 2006-06-01 |
| Timing closure methodology App 20050120319 - van Ginneken, Lukas P.P.P. | 2005-06-02 |
| Timing closure methodology Grant 6,725,438 - van Ginneken April 20, 2 | 2004-04-20 |
| Timing optimization in presence of interconnect delays Grant 6,553,338 - Buch , et al. April 22, 2 | 2003-04-22 |
| Method for storing multiple levels of design data in a common database Grant 6,505,328 - Van Ginneken , et al. January 7, 2 | 2003-01-07 |
| Timing closure methodology Grant 6,453,446 - van Ginneken September 17, 2 | 2002-09-17 |
| Timing closure methodology App 20020116685 - van Ginneken, Lukas P.P.P. | 2002-08-22 |
| Method of designing a constraint-driven integrated circuit layout Grant 6,230,304 - Groeneveld , et al. May 8, 2 | 2001-05-08 |
| Incremental timing analysis Grant 5,508,937 - Abato , et al. April 16, 1 | 1996-04-16 |
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