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name:-0.087565898895264
name:-0.080961942672729
name:-0.023152112960815
Van Doren; Stephen R. Patent Filings

Van Doren; Stephen R.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Van Doren; Stephen R..The latest application filed is for "techniques to support mulitple interconnect protocols for an interconnect".

Company Profile
26.64.74
  • Van Doren; Stephen R. - Portland OR
  • Van Doren; Stephen R. - Northborough MA US
  • Van Doren; Stephen R. - Shrewsbury MA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Systems, methods, and apparatuses for heterogeneous computing
Grant 11,416,281 - Sankaran , et al. August 16, 2
2022-08-16
Techniques To Support Mulitple Interconnect Protocols For An Interconnect
App 20220197847 - Van Doren; Stephen R. ;   et al.
2022-06-23
Method, apparatus, system for early page granular hints from a PCIe device
Grant 11,347,662 - Agarwal , et al. May 31, 2
2022-05-31
Systems, Methods, And Apparatuses For Heterogeneous Computing
App 20220164218 - SANKARAN; Rajesh M. ;   et al.
2022-05-26
Coherent Accelerator Fabric Controller
App 20220114105 - Gupta; Ritu ;   et al.
2022-04-14
Remote Atomic Operations In Multi-socket Systems
App 20220091983 - Jayasimha; Doddaballapur N. ;   et al.
2022-03-24
Coherent accelerator fabric controller
Grant 11,263,143 - Gupta , et al. March 1, 2
2022-03-01
Techniques to support multiple interconnect protocols for a common set of interconnect connectors
Grant 11,245,604 - Wagh , et al. February 8, 2
2022-02-08
Techniques To Support Multiple Protocols Between Computer System Interconnects
App 20210399982 - Das Sharma; Debendra ;   et al.
2021-12-23
PCIe controller with extensions to provide coherent memory mapping between accelerator memory and host memory
Grant 11,204,867 - Agarwal , et al. December 21, 2
2021-12-21
Remote atomic operations in multi-socket systems
Grant 11,138,112 - Jayasimha , et al. October 5, 2
2021-10-05
Systems, methods, and apparatuses for heterogeneous computing
Grant 11,093,277 - Sankaran , et al. August 17, 2
2021-08-17
Techniques to support multiple protocols between computer system interconnects
Grant 11,095,556 - Das Sharma , et al. August 17, 2
2021-08-17
Non-posted Write Transactions For A Computer Bus
App 20210209037 - Sankaran; Rajesh M. ;   et al.
2021-07-08
Techniques for managing access to hardware accelerator memory
Grant 11,030,126 - Koufaty , et al. June 8, 2
2021-06-08
Techniques To Support Multiple Interconnect Protocols For A Common Set Of Interconnect Connectors
App 20210109300 - WAGH; MAHESH ;   et al.
2021-04-15
Non-posted write transactions for a computer bus
Grant 10,970,238 - Sankaran , et al. April 6, 2
2021-04-06
System and method for per-agent control and quality of service of shared resources in chip multiprocessor platforms
Grant 10,936,490 - Herdrich , et al. March 2, 2
2021-03-02
Multi-core communication acceleration using hardware queue device
Grant 10,929,323 - Wang , et al. February 23, 2
2021-02-23
Techniques to support multiple interconnect protocols for a common set of interconnect connectors
Grant 10,884,195 - Wagh , et al. January 5, 2
2021-01-05
Method and apparatus to provide secure application execution
Grant 10,885,202 - McKeen , et al. January 5, 2
2021-01-05
Systems, Methods, And Apparatuses For Heterogeneous Computing
App 20200401440 - SANKARAN; Rajesh M. ;   et al.
2020-12-24
Spatial And Temporal Merging Of Remote Atomic Operations
App 20200319886 - Hughes; Christopher J. ;   et al.
2020-10-08
Scalably mechanism to implement an instruction that monitors for writes to an address
Grant 10,705,961 - Liu , et al.
2020-07-07
Scalable Multi-key Total Memory Encryption Engine
App 20200201787 - Shanbhogue; Vedvyas ;   et al.
2020-06-25
Spatial and temporal merging of remote atomic operations
Grant 10,572,260 - Hughes , et al. Feb
2020-02-25
Multi-core Communication Acceleration Using Hardware Queue Device
App 20200042479 - Wang; Ren ;   et al.
2020-02-06
Non-posted Write Transactions
App 20200004703 - Sankaran; Rajesh M. ;   et al.
2020-01-02
Systems, Methods, And Apparatuses For Heterogeneous Computing
App 20190347125 - SANKARAN; Rajesh M. ;   et al.
2019-11-14
Multi-core communication acceleration using hardware queue device
Grant 10,445,271 - Wang , et al. Oc
2019-10-15
Remote Atomic Operations In Multi-socket Systems
App 20190243761 - Jayasimha; Doddaballapur N. ;   et al.
2019-08-08
Spatial And Temporal Merging Of Remote Atomic Operations
App 20190205139 - Hughes; Christopher J. ;   et al.
2019-07-04
Remote atomic operations in multi-socket systems
Grant 10,296,459 - Jayasimha , et al.
2019-05-21
Accelerator Fabric
App 20190102311 - Gupta; Ritu ;   et al.
2019-04-04
COHERENT MEMORY DEVICES OVER PCIe
App 20190102292 - Agarwal; Ishwar ;   et al.
2019-04-04
Method, Apparatus, System For Early Page Granular Hints From A Pcie Device
App 20190102326 - Agarwal; Ishwar ;   et al.
2019-04-04
Method And Apparatus To Provide Secure Application Execution
App 20190087586 - McKEEN; Francis X. ;   et al.
2019-03-21
Globally Addressable Memory For Devices Linked To Hosts
App 20190042455 - Agarwal; Ishwar ;   et al.
2019-02-07
Techniques For Managing Access To Hardware Accelerator Memory
App 20190018806 - KOUFATY; DAVID A. ;   et al.
2019-01-17
Techniques To Support Multiple Protocols Between Computer System Interconnects
App 20190007310 - DAS SHARMA; DEBENDRA ;   et al.
2019-01-03
Techniques To Support Mulitple Interconnect Protocols For An Interconnect
App 20190004990 - VAN DOREN; STEPHEN R. ;   et al.
2019-01-03
System And Method For Per-agent Control And Quality Of Service Of Shared Resources In Chip Multiprocessor Platforms
App 20180373633 - Herdrich; Andrew J. ;   et al.
2018-12-27
Method and apparatus to provide secure application execution
Grant 10,102,380 - McKeen , et al. October 16, 2
2018-10-16
Techniques To Support Multiple Interconnect Protocols For A Common Set Of Interconnect Connectors
App 20180024960 - WAGH; MAHESH ;   et al.
2018-01-25
Multi-core Communication Acceleration Using Hardware Queue Device
App 20170192921 - Wang; Ren ;   et al.
2017-07-06
Inclusive and non-inclusive tracking of local cache lines to avoid near memory reads on cache line memory writes into a two level system memory
Grant 9,418,009 - Moga , et al. August 16, 2
2016-08-16
Method and apparatus to provide secure application execution
Grant 9,087,200 - McKeen , et al. July 21, 2
2015-07-21
Inclusive/Non Inclusive Tracking of Local Cache Lines To Avoid Near Memory Reads On Cache Line Memory Writes Into A Two Level System Memory
App 20150186275 - Moga; Adrian C. ;   et al.
2015-07-02
Scalably Mechanism To Implement An Instruction That Monitors For Writes To An Address
App 20150095580 - Liu; Yen-Cheng ;   et al.
2015-04-02
Method And Apparatus To Provide Secure Application Execution
App 20130198853 - McKEEN; Francis X. ;   et al.
2013-08-01
Method And Apparatus To Provide Secure Application Execution
App 20130159726 - MCKEEN; Francis X. ;   et al.
2013-06-20
System and method for non-migratory requests in a cache coherency protocol
Grant 8,468,308 - Steely, Jr. , et al. June 18, 2
2013-06-18
System and method for resolving transactions in a cache coherency protocol
Grant 8,176,259 - Van Doren , et al. May 8, 2
2012-05-08
Cache coherency protocol with ordering points
Grant 8,145,847 - Van Doren , et al. March 27, 2
2012-03-27
System and method for creating ordering points
Grant 8,090,914 - Tierney , et al. January 3, 2
2012-01-03
Directory Cache Allocation Based On Snoop Response Information
App 20100332762 - Moga; Adrian C. ;   et al.
2010-12-30
Transaction references for requests in a multi-processor network
Grant 7,856,534 - Van Doren , et al. December 21, 2
2010-12-21
System and method to facilitate ordering point migration
Grant 7,818,391 - Van Doren , et al. October 19, 2
2010-10-19
System and method to facilitate ordering point migration to memory
Grant 7,769,959 - Van Doren , et al. August 3, 2
2010-08-03
System and method for conflict responses in a cache coherency protocol
Grant 7,620,696 - Van Doren , et al. November 17, 2
2009-11-17
System and method for conflict responses in a cache coherency protocol with ordering point migration
Grant 7,395,374 - Tierney , et al. July 1, 2
2008-07-01
Multi-processor system utilizing concurrent speculative source request and system source request in response to cache miss
Grant 7,380,107 - Steely, Jr. , et al. May 27, 2
2008-05-27
Coherent signal in a multi-processor system
Grant 7,376,794 - Steely, Jr. , et al. May 20, 2
2008-05-20
Firm partitioning in a system with a point-to-point interconnect
App 20070150699 - Schoinas; Ioannis T. ;   et al.
2007-06-28
System and method for avoiding deadlock
Grant 7,203,775 - Van Doren , et al. April 10, 2
2007-04-10
System and method for responses between different cache coherency protocols
Grant 7,177,987 - Van Doren , et al. February 13, 2
2007-02-13
Mechanism for resolving ambiguous invalidates in a computer system
Grant 7,174,431 - Van Doren , et al. February 6, 2
2007-02-06
System and method for blocking data responses
Grant 7,149,852 - Van Doren , et al. December 12, 2
2006-12-12
System and method for read migratory optimization in a cache coherency protocol
Grant 7,143,245 - Tierney , et al. November 28, 2
2006-11-28
Directory structure permitting efficient write-backs in a shared memory computer system
Grant 7,051,163 - Van Doren , et al. May 23, 2
2006-05-23
Mechanism for resolving ambiguous invalidates in a computer system
App 20060095673 - Van Doren; Stephen R. ;   et al.
2006-05-04
System and method enabling efficient cache line reuse in a computer system
Grant 7,024,520 - Tierney , et al. April 4, 2
2006-04-04
Locked cache line sharing
App 20060041724 - Steely; Simon C. JR. ;   et al.
2006-02-23
Generalized active inheritance consistency mechanism having linked writes
Grant 7,003,635 - Van Doren February 21, 2
2006-02-21
Channel-based late race resolution mechanism for a computer system
Grant 7,000,080 - Van Doren , et al. February 14, 2
2006-02-14
Mechanism for resolving ambiguous invalidates in a computer system
Grant 6,990,559 - Van Doren , et al. January 24, 2
2006-01-24
System and method to facilitate ordering point migration
App 20050198440 - Van Doren, Stephen R. ;   et al.
2005-09-08
System and method for conflict responses in a cache coherency protocol
App 20050198192 - Van Doren, Stephen R. ;   et al.
2005-09-08
Computer system supporting both dirty-shared and non dirty-shared data processing entities
App 20050188159 - Van Doren, Stephen R. ;   et al.
2005-08-25
System and method for read migratory optimization in a cache coherency protocol
App 20050160236 - Tierney, Gregory Edward ;   et al.
2005-07-21
Transaction references for requests in a multi-processor network
App 20050160132 - Van Doren, Stephen R. ;   et al.
2005-07-21
System and method for conflict responses in a cache coherency protocol with ordering point migration
App 20050160232 - Tierney, Gregory Edward ;   et al.
2005-07-21
System and method to facilitate ordering point migration to memory
App 20050160233 - Van Doren, Stephen R. ;   et al.
2005-07-21
System and method for conflict responses in a cache coherency protocol with ordering point migration
App 20050160238 - Steely, Simon C. JR. ;   et al.
2005-07-21
System and method for blocking data responses
App 20050160240 - Van Doren, Stephen R. ;   et al.
2005-07-21
System and method for non-migratory requests in a cache coherency protocol
App 20050160235 - Steely, Simon C. JR. ;   et al.
2005-07-21
System and method for creating ordering points
App 20050160237 - Tierney, Gregory Edward ;   et al.
2005-07-21
System and method for resolving transactions in a cache coherency protocol
App 20050160209 - Van Doren, Stephen R. ;   et al.
2005-07-21
Coherent signal in a multi-processor system
App 20050154833 - Steely, Simon C. JR. ;   et al.
2005-07-14
Multi-processor system utilizing speculative source requests
App 20050154863 - Steely, Simon C. JR. ;   et al.
2005-07-14
Low latency inter-reference ordering in a multiple processor system employing a multiple-level inter-node switch
Grant 6,904,465 - Steely, Jr. , et al. June 7, 2
2005-06-07
Computer system supporting both dirty-shared and non-dirty-shared data processing entities
Grant 6,898,676 - Van Doren , et al. May 24, 2
2005-05-24
Retry-based late race resolution mechanism for a computer system
Grant 6,895,476 - Tierney , et al. May 17, 2
2005-05-17
Linked-list early race resolution mechanism
Grant 6,892,290 - Van Doren May 10, 2
2005-05-10
Livelock prevention by delaying surrender of ownership upon intervening ownership request during load locked / store conditional atomic memory operation
Grant 6,801,986 - Steely, Jr. , et al. October 5, 2
2004-10-05
System and method for avoiding deadlock
App 20040133744 - Van Doren, Stephen R. ;   et al.
2004-07-08
Computer system supporting both dirty-shared and non dirty-shared data processing entities
App 20040068624 - Van Doren, Stephen R. ;   et al.
2004-04-08
Channel-based late race resolution mechanism for a computer system
App 20040066758 - Van Doren, Stephen R. ;   et al.
2004-04-08
System and method enabling efficient cache line reuse in a computer system
App 20040068616 - Tierney, Gregory E. ;   et al.
2004-04-08
Generalized active inheritance consistency mechanism for a computer system
App 20040068621 - Van Doren, Stephen R.
2004-04-08
Linked-list early race resolution mechanism
App 20040068619 - Van Doren, Stephen R.
2004-04-08
Retry-based late race resolution mechanism for a computer system
App 20040068613 - Tierney, Gregory E. ;   et al.
2004-04-08
Mechanism for resolving ambiguous invalidates in a computer system
App 20040068622 - Van Doren, Stephen R. ;   et al.
2004-04-08
Directory structure permitting efficient write-backs in a shared memory computer system
App 20040068620 - Van Doren, Stephen R. ;   et al.
2004-04-08
Method and system for a processor to gain assured ownership of an up-to-date copy of data
Grant 6,636,948 - Steely, Jr. , et al. October 21, 2
2003-10-21
Method and apparatus for implementing a relaxed ordering model in a computer system
App 20030145136 - Tierney, Gregory E. ;   et al.
2003-07-31
Mechanism for packet component merging and channel assignment, and packet decomposition and channel reassignment in a multiprocessor system
App 20030076831 - Van Doren, Stephen R. ;   et al.
2003-04-24
Apparatus and method for ownership load locked misses for atomic lock acquisition in a multiprocessor computer system
App 20030037223 - Steely, Simon C. JR. ;   et al.
2003-02-20
Low latency inter-reference ordering in a multiple processor system employing a multiple-level inter-node switch
App 20020194290 - Steely, Simon C. JR. ;   et al.
2002-12-19
Credit-based flow control technique in a modular multiprocessor system
App 20020146022 - Van Doren, Stephen R. ;   et al.
2002-10-10
Method and apparatus for delivering error interrupts to a processor of a modular, multiprocessor system
App 20020029358 - Pawlowski, Chester W. ;   et al.
2002-03-07
Multicast decomposition mechanism in a hierarchically order distributed shared memory multiprocessor computer system
App 20020009095 - Van Doren, Stephen R. ;   et al.
2002-01-24
Multi-agent synchronized initialization of a clock forwarded interconnect based computer system
App 20020010872 - Van Doren, Stephen R. ;   et al.
2002-01-24
Initiate flow control mechanism of a modular multiprocessor system
App 20010055277 - Steely, Simon C. JR. ;   et al.
2001-12-27
Low order channel flow control for an interleaved multiblock resource
App 20010049742 - Steely, Simon C. JR. ;   et al.
2001-12-06
Interrupt handling via a proxy processor
App 20010037426 - Pawlowski, Chester W. ;   et al.
2001-11-01
Distributed address mapping and routing table mechanism that supports flexible configuration and partitioning in a modular switch-based, shared-memory multiprocessor computer system
App 20010037435 - Van Doren, Stephen R.
2001-11-01
Mechanism for selectively imposing interference order between page-table fetches and corresponding data fetches
Grant 6,286,090 - Steely, Jr. , et al. September 4, 2
2001-09-04
Mechanism for optimizing generation of commit-signals in a distributed shared-memory system
Grant 6,209,065 - Van Doren , et al. March 27, 2
2001-03-27
Method and apparatus for reducing latency of inter-reference ordering in a multiprocessor system
Grant 6,108,737 - Sharma , et al. August 22, 2
2000-08-22
Mechanism for reducing latency of memory barrier operations on a multiprocessor system
Grant 6,088,771 - Steely, Jr. , et al. July 11, 2
2000-07-11
Method and apparatus for employing commit-signals and prefetching to maintain inter-reference ordering in a high-performance I/O processor
Grant 6,085,263 - Sharma , et al. July 4, 2
2000-07-04
Distributed data bus sequencing for a system bus with separate address and data bus protocols
Grant 6,076,129 - Fenwick , et al. June 13, 2
2000-06-13
Technique for reducing latency of inter-reference ordering using commit signals in a multiprocessor system having shared caches
Grant 6,055,605 - Sharma , et al. April 25, 2
2000-04-25
Memory bank addressing scheme
Grant 5,848,258 - Fenwick , et al. December 8, 1
1998-12-08
Method and apparatus for performing atomic transactions in a shared memory multi processor system
Grant 5,761,731 - Van Doren , et al. June 2, 1
1998-06-02
System bus with separate address and data bus protocols
Grant 5,737,546 - Fenwick , et al. April 7, 1
1998-04-07
Distributed data bus sequencing for a system bus with separate address and data bus protocols
Grant 5,666,551 - Fenwick , et al. September 9, 1
1997-09-09
Method and apparatus for adaptive memory access
Grant 5,566,325 - Bruce, II , et al. October 15, 1
1996-10-15
System for handling cache memory victim data which transfers data from cache to the interface while CPU performs a cache lookup using cache status information
Grant 5,537,575 - Foley , et al. July 16, 1
1996-07-16

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