| Patent | Date |
|---|
Semiconductor device to reduce energy consumed to write data
Grant 10,373,677 - Usami , et al. | 2019-08-06 |
Non-volatile memory circuit
Grant 10,373,663 - Usami , et al. | 2019-08-06 |
Semiconductor Device
App 20180197600 - USAMI; Kimiyoshi ; et al. | 2018-07-12 |
Non-volatile Memory Circuit
App 20180158500 - USAMI; Kimiyoshi ; et al. | 2018-06-07 |
Semiconductor integrated circuit having an oblique global signal wiring and semiconductor integrated circuit wiring method
Grant 8,026,537 - Kojima , et al. September 27, 2 | 2011-09-27 |
Power off controlling circuit and power-off controlling method
Grant 7,956,678 - Usami June 7, 2 | 2011-06-07 |
Power-off Controlling Circuit And Power-off Controlling Method
App 20100052770 - Usami; Kimiyoshi | 2010-03-04 |
Semiconductor Integrated Circuit Having An Oblique Global Signal Wiring And Semiconductor Integrated Circuit Wiring Method
App 20070235766 - Kojima; Naohito ; et al. | 2007-10-11 |
Semiconductor integrated circuit with reduced leakage current
Grant 7,109,771 - Furusawa , et al. September 19, 2 | 2006-09-19 |
Semiconductor integrated circuit with reduced leakage current
Grant 7,088,161 - Furusawa , et al. August 8, 2 | 2006-08-08 |
Computer aided design system and computer-readable medium storing a program for designing clock gated logic circuits and gated clock circuit
Grant 7,062,725 - Kitahara , et al. June 13, 2 | 2006-06-13 |
Semiconductor integrated circuit with reduced leakage current
Grant 6,861,882 - Furusawa , et al. March 1, 2 | 2005-03-01 |
Semiconductor integrated circuit with reduced leakage current
App 20050035802 - Furusawa, Toshiyuki ; et al. | 2005-02-17 |
Semiconductor integrated circuit with reduced leakage current
App 20050035803 - Furusawa, Toshiyuki ; et al. | 2005-02-17 |
Logic circuit design equipment and method for designing logic circuit for reducing leakage current
Grant 6,813,750 - Usami , et al. November 2, 2 | 2004-11-02 |
Semiconductor integrated circuit having an oblique global signal wiring and semiconductor integrated circuit wiring method
App 20040183103 - Kojima, Naohito ; et al. | 2004-09-23 |
Semiconductor integrated circuit, logic operation circuit, and flip flop
Grant 6,750,680 - Zama , et al. June 15, 2 | 2004-06-15 |
Semiconductor Integrated Circuit, Supply Method For Supplying Multiple Supply Voltages In Semiconductor Integrated Circuit, And Record Medium For Storing Program Of Supply Method For Supplying Multiple Supply Voltages In Semiconductor Integrated Circuit
Grant 6,683,336 - Igarashi , et al. January 27, 2 | 2004-01-27 |
Clock supplying circuit and method having enable buffer cells with first and second input terminals
Grant 6,668,363 - Minami , et al. December 23, 2 | 2003-12-23 |
Computer aided design system and computer-readable medium storing a program for designing clock gated logic circuits and gated clock circuit
App 20030140318 - Kitahara, Takeshi ; et al. | 2003-07-24 |
Semiconductor integrated circuit with reduced leakage current
App 20030102898 - Furusawa, Toshiyuki ; et al. | 2003-06-05 |
Low power test circuit and a semiconductor integrated circuit with the low power test circuit
App 20030088836 - Kanazawa, Masahiro ; et al. | 2003-05-08 |
Semiconductor integrated circuit employing power management device and power management method for the semiconductor integrated circuit
Grant 6,535,982 - Kawabe , et al. March 18, 2 | 2003-03-18 |
Logic circuit design equipment and method for designing logic circuit for reducing leakage current
App 20020144223 - Usami, Kimiyoshi ; et al. | 2002-10-03 |
Automatic circuit generation system and automatic circuit generation method and automatic circuit generation program
App 20020099989 - Kawabe, Naoyuki ; et al. | 2002-07-25 |
Semiconductor integrated circuit with reduced leakage current
App 20020036529 - Furusawa, Toshiyuki ; et al. | 2002-03-28 |
Semiconductor integrated circuit, logic operation circuit, and flip flop
App 20020008545 - Zama, Hidemasa ; et al. | 2002-01-24 |
Automatic circuit generation apparatus and method, and computer program product for executing the method
App 20020002701 - Usami, Kimiyoshi ; et al. | 2002-01-03 |
Method and apparatus for clock gated logic circuits to reduce electric power consumption
App 20010029599 - Minami, Fumihiro ; et al. | 2001-10-11 |
Power estimation of a microprocessor based on power consumption of memory
Grant 6,055,640 - Kageshima , et al. April 25, 2 | 2000-04-25 |
Low power combinational logic circuit
Grant 5,594,368 - Usami January 14, 1 | 1997-01-14 |
Memory cell for use in a multi-port RAM
Grant 5,307,322 - Usami , et al. April 26, 1 | 1994-04-26 |
Precharged-type logic circuit having dummy precharge line
Grant 5,083,047 - Horie , et al. January 21, 1 | 1992-01-21 |
Programable logic array using one control clock signal
Grant 5,010,258 - Usami , et al. April 23, 1 | 1991-04-23 |
Programmable logic arrays with each array column divided into a plurality of series connections of FETs
Grant 4,902,918 - Sugeno , et al. February 20, 1 | 1990-02-20 |
Programmable logic array with 2-bit input partitioning
Grant 4,886,987 - Usami December 12, 1 | 1989-12-12 |
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