URAOKA; Yukiharu

Patent Applications and Registrations

Patent applications and USPTO patent grants for URAOKA; Yukiharu.The latest application filed is for "gate insulating film forming composition".

Company Profile

5.9.8

URAOKA; Yukiharu - Ikoma-shi JP
Uraoka; Yukiharu - Ikoma JP
Uraoka; Yukiharu - Nara JP
Uraoka; Yukiharu - Nara-ken JP

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Gate Insulating Film Forming Composition App 20220267639 - URAOKA; Yukiharu ; et al.	2022-08-25
Thin film transistor substrate provided with protective film and method for producing same Grant 10,916,661 - Uraoka , et al. February 9, 2	2021-02-09
Thin film transistor, method for manufacturing same and semiconductor device comprising said thin film transistor Grant 10,475,934 - Uraoka , et al. Nov	2019-11-12
Thin Film Transistor Substrate Provided With Protective Film And Method For Producing Same App 20190319131 - URAOKA; Yukiharu ; et al.	2019-10-17
Thin Film Transistor, Method For Manufacturing Same And Semiconductor Device Comprising Said Thin Film Transistor App 20190006525 - URAOKA; Yukiharu ; et al.	2019-01-03
Fusion protein Grant 9,187,570 - Inoue , et al. November 17, 2	2015-11-17
Porous Structure Body And Method For Producing The Same App 20140150855 - INOUE; Ippei ; et al.	2014-06-05
Fusion Protein App 20140045247 - INOUE; IPPEI ; et al.	2014-02-13
Method For Electrochemically Detecting Analyte App 20120267258 - URAOKA; Yukiharu ; et al.	2012-10-25
Method of fabricating thin-film transistor Grant 7,901,978 - Uraoka , et al. March 8, 2	2011-03-08
Method of Fabricating Thin-Film Transistor App 20090050880 - Uraoka; Yukiharu ; et al.	2009-02-26
Semiconductor wafer package, method and apparatus for connecting testing IC terminals of semiconductor wafer and probe terminals, testing method of a semiconductor integrated circuit, probe card and its manufacturing method Grant 6,323,663 - Nakata , et al. November 27, 2	2001-11-27
Semiconductor wafer package, method and apparatus for connecting testing IC terminals of semiconductor wafer and probe terminals, testing method of a semiconductor integrated circuit, probe card and its manufacturing method Grant 6,005,401 - Nakata , et al. December 21, 1	1999-12-21
Semiconductor wafer package, method and apparatus for connecting testing IC terminals of semiconductor wafer and probe terminals, testing method of a semiconductor integrated circuit, probe card and its manufacturing method Grant 5,945,834 - Nakata , et al. August 31, 1	1999-08-31
Method of presuming life time of semiconductor device Grant 5,650,336 - Eriguchi , et al. July 22, 1	1997-07-22
Device for and method of evaluating semiconductor integrated circuit Grant 5,504,431 - Maeda , et al. April 2, 1	1996-04-02

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