Upton; Michael D.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Upton; Michael D..The latest application filed is for "generational thread scheduler".

Company Profile

0.21.16

Upton; Michael D. - Seattle WA
Upton; Michael D. - Portland OR
Upton; Michael D - Portland OR

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Apparatus and method for efficient gather and scatter operations Grant 9,785,436 - Grochowski , et al. October 10, 2	2017-10-10
Generational Thread Scheduler App 20170031729 - Grochowski; Edward T. ; et al.	2017-02-02
Generational thread scheduler using reservations for fair scheduling Grant 9,465,670 - Grochowski , et al. October 11, 2	2016-10-11
Processor having execution core sections operating at different clock rates Grant RE45,487 - Sager , et al. April 21, 2	2015-04-21
Apparatus And Method For Efficient Gather And Scatter Operations App 20140095831 - Grochowski; Edward T. ; et al.	2014-04-03
Processor having execution core sections operating at different clock rates Grant RE44,494 - Sager , et al. September 10, 2	2013-09-10
Generational Thread Scheduler App 20130160020 - Grochowski; Edward T. ; et al.	2013-06-20
Processor Having Execution Core Sections Operating At Different Clock Rates App 20120042151 - Sager; David J. ; et al.	2012-02-16
Method and Apparatus for Assigning Thread Priority in a Processor or the Like App 20110239221 - Burns; David W. ; et al.	2011-09-29
Method and apparatus for assigning thread priority in a processor or the like Grant 7,987,346 - Burns , et al. July 26, 2	2011-07-26
Method And Apparatus For Assigning Thread Priority In A Processor Or The Like App 20110113222 - BURNS; David W. ; et al.	2011-05-12
Method and apparatus for assigning thread priority in a processor or the like Grant 7,877,583 - Burns , et al. January 25, 2	2011-01-25
Method And Apparatus For Assigning Thread Priority In A Processor Or The Like App 20090070562 - BURNS; David W. ; et al.	2009-03-12
Method and apparatus for assigning thread priority in a processor or the like Grant 7,454,600 - Burns , et al. November 18, 2	2008-11-18
Use of a context identifier in a cache memory Grant 7,085,889 - Hammarlund , et al. August 1, 2	2006-08-01
Determining whether thread fetch operation will be blocked due to processing of another thread Grant 7,010,669 - Burns , et al. March 7, 2	2006-03-07
Processor having replay architecture with fast and slow replay paths Grant 6,735,688 - Upton , et al. May 11, 2	2004-05-11
Method and apparatus for resolving instruction starvation in a processor or the like App 20040078794 - Burns, David W. ; et al.	2004-04-22
Determination of approaching instruction starvation of threads based on a plurality of conditions Grant 6,651,158 - Burns , et al. November 18, 2	2003-11-18
Processing requests to efficiently access a limited bandwidth storage area Grant 6,643,747 - Hammarlund , et al. November 4, 2	2003-11-04
Use of a context identifier in a cache memory App 20030182512 - Hammarlund, Per ; et al.	2003-09-25
Controlling a store data forwarding mechanism during execution of a load operation App 20030177312 - Baktha, Aravindh ; et al.	2003-09-18
Method and apparatus for resolving instruction starvation in a processor or the like App 20020199089 - Burns, David W. ; et al.	2002-12-26
Method and apparatus for assigning thread priority in a processor or the like App 20020199088 - Burns, David W. ; et al.	2002-12-26
Processing requests to efficiently access a limited bandwidth storage area App 20020083244 - Hammarlund, Per H. ; et al.	2002-06-27
Method and apparatus for lock synchronization in a microprocessor system Grant 6,370,625 - Carmean , et al. April 9, 2	2002-04-09
Processor having execution core sections operating at different clock rates App 20010029590 - Sager, David J. ; et al.	2001-10-11
Processor having execution core sections operating at different clock rates Grant 6,216,234 - Sager , et al. April 10, 2	2001-04-10
Trace based instruction caching Grant 6,170,038 - Krick , et al. January 2, 2	2001-01-02
Computer processor with a replay system having a plurality of checkers Grant 6,094,717 - Merchant , et al. July 25, 2	2000-07-25
Trace based instruction caching Grant 6,018,786 - Krick , et al. January 25, 2	2000-01-25
Processor having execution core sections operating at different clock rates Grant 5,828,868 - Sager , et al. October 27, 1	1998-10-27
Method and apparatus for designing the layout of a subcircuit in an integrated circuit Grant 5,351,197 - Upton , et al. September 27, 1	1994-09-27

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