loadpatents
name:-0.024070024490356
name:-0.055335998535156
name:-0.016106128692627
UPADHYAYA; Parag Patent Filings

UPADHYAYA; Parag

Patent Applications and Registrations

Patent applications and USPTO patent grants for UPADHYAYA; Parag.The latest application filed is for "communication between integrated circuit (ic) dies in wafer-level fan-out package".

Company Profile
16.53.23
  • UPADHYAYA; Parag - Los Gatos CA
  • Upadhyaya; Parag - San Jose CA US
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Communication Between Integrated Circuit (ic) Dies In Wafer-level Fan-out Package
App 20220102293 - POON; Chi Fung ;   et al.
2022-03-31
Analog-based DC offset compensation
Grant 11,277,144 - Cho , et al. March 15, 2
2022-03-15
Latch-based level shifter circuit with self-biasing
Grant 11,190,172 - Raj , et al. November 30, 2
2021-11-30
Low Power Inverter-based Ctle
App 20210288590 - CHO; Junho ;   et al.
2021-09-16
Low noise quadrature signal generation
Grant 11,108,401 - Shin , et al. August 31, 2
2021-08-31
Low Noise Quadrature Signal Generation
App 20210152180 - Shin; Jaewook ;   et al.
2021-05-20
Circuits for and methods of calibrating a circuit in an integrated circuit device
Grant 11,003,203 - Poon , et al. May 11, 2
2021-05-11
Temperature-locked loop for optical elements having a temperature-dependent response
Grant 11,005,572 - Chiang , et al. May 11, 2
2021-05-11
Flexible wide-range and high bandwidth auxiliary clock and data recovery (CDR) circuit for transceivers
Grant 10,868,663 - Turker Melek , et al. December 15, 2
2020-12-15
Systems and methods for providing capacitor structures in an integrated circuit
Grant 10,847,604 - Jing , et al. November 24, 2
2020-11-24
Continuous time linear equalization (CTLE) adaptation algorithm enabling baud-rate clock data recovery(CDR) locked to center of eye
Grant 10,791,009 - Wu , et al. September 29, 2
2020-09-29
Circuits For And Methods Of Calibrating A Circuit In An Integrated Circuit Device
App 20200293080 - Poon; Chi Fung ;   et al.
2020-09-17
Method And Apparatus For A Phase Locked Loop Circuit
App 20200287551 - Raj; Mayank ;   et al.
2020-09-10
Method and apparatus for a phase locked loop circuit
Grant 10,749,532 - Raj , et al. A
2020-08-18
Multi-port inductors and transformers for accurately predicting voltage-controlled oscillator (VCO) frequency
Grant 10,715,153 - Bekele , et al.
2020-07-14
Circuit for and method of receiving signals in an integrated circuit device
Grant 10,715,358 - Zhang , et al.
2020-07-14
Temperature-dependent phase-locked loop (PLL) reset for clock synthesizers
Grant 10,630,301 - Bekele , et al.
2020-04-21
Reconfigurable fractional-N frequency generation for a phase-locked loop
Grant 10,623,008 - Upadhyaya , et al.
2020-04-14
Isolation enhancement with on-die slot-line on power/ground grid structure
Grant 10,559,561 - Wu , et al. Feb
2020-02-11
Ultra-low-power injection locked oscillator for IQ clock generation
Grant 10,536,151 - Zhou , et al. Ja
2020-01-14
Electrical circuits and methods to correct duty cycle error
Grant 10,498,318 - Shin , et al. De
2019-12-03
Isolation Enhancement With On-die Slot-line On Power/ground Grid Structure
App 20190229113 - Wu; Zhaoyin D. ;   et al.
2019-07-25
Programmable digital sigma delta modulator
Grant 10,348,310 - Megawer , et al. July 9, 2
2019-07-09
Delta-sigma modulator having expanded fractional input range
Grant 10,291,239 - Wu , et al.
2019-05-14
Unified low power bidirectional port
Grant 10,270,450 - Ma , et al.
2019-04-23
Clock and data recovery circuit having tunable fractional-N phase locked loop
Grant 10,224,937 - Wu , et al.
2019-03-05
Circuits for and methods of implementing an inductor and a pattern ground shield in an integrated circuit
Grant 10,217,703 - Upadhyaya , et al. Feb
2019-02-26
Circuits For And Methods Of Implementing An Inductor And A Pattern Ground Shield In An Integrated Circuit
App 20180190584 - Upadhyaya; Parag ;   et al.
2018-07-05
Method and apparatus for clock phase generation
Grant 9,954,539 - Namkoong , et al. April 24, 2
2018-04-24
Integrated Circuit With Shielding Structures
App 20180076134 - Jing; Jing ;   et al.
2018-03-15
Resolution programmable SAR ADC
Grant 9,906,232 - Cho , et al. February 27, 2
2018-02-27
Method And Apparatus For Clock Phase Generation
App 20180013435 - Namkoong; Jinyung ;   et al.
2018-01-11
Method for increasing active inductor operating range and peaking gain
Grant 9,774,315 - Namkoong , et al. September 26, 2
2017-09-26
Linear gain code interleaved automatic gain control circuit
Grant 9,755,600 - Turker Melek , et al. September 5, 2
2017-09-05
Linear Gain Code Interleaved Automatic Gain Control Circuit
App 20170244371 - Turker Melek; Didem Z. ;   et al.
2017-08-24
Phase-locked loop having sampling phase detector
Grant 9,742,380 - Raj , et al. August 22, 2
2017-08-22
Method For Increasing Active Inductor Operating Range And Peaking Gain
App 20170134009 - Namkoong; Jinyung ;   et al.
2017-05-11
Digital fractional-N multiplying injection locked oscillator
Grant 9,614,537 - Nandwana , et al. April 4, 2
2017-04-04
Phase interpolator and method of implementing a phase interpolator
Grant 9,608,611 - Hearne , et al. March 28, 2
2017-03-28
Phase-locked loop having sub-sampling phase detector
Grant 9,608,644 - Raj , et al. March 28, 2
2017-03-28
Broadband in-phase and quadrature phase signal generation
Grant 9,559,792 - Amir-Aslanzadeh , et al. January 31, 2
2017-01-31
Circuits for and methods of generating a divided clock signal with a configurable phase offset
Grant 9,553,592 - Sewani , et al. January 24, 2
2017-01-24
Reconfigurable Fractional-n Frequency Generation For A Phase-locked Loop
App 20160322979 - Upadhyaya; Parag ;   et al.
2016-11-03
Circuits for and methods of implementing a dual-mode oscillator
Grant 9,356,556 - Raj , et al. May 31, 2
2016-05-31
Voltage controlled oscillator including MuGFETS
Grant 9,325,277 - Bekele , et al. April 26, 2
2016-04-26
Adjustable buffer circuit
Grant 9,225,332 - Zhang , et al. December 29, 2
2015-12-29
Input/output circuits and methods of implementing an input/output circuit
Grant 9,214,941 - Sewani , et al. December 15, 2
2015-12-15
Transceiver for providing a clock signal
Grant 9,148,192 - Wong , et al. September 29, 2
2015-09-29
Front-end circuit with electro-static discharge protection
Grant 9,136,690 - Upadhyaya , et al. September 15, 2
2015-09-15
Input/output Circuits And Methods Of Implementing An Input/output Circuit
App 20150061756 - Sewani; Aman ;   et al.
2015-03-05
Interdigitated capacitor having digits of varying width
Grant 8,941,974 - Wu , et al. January 27, 2
2015-01-27
Inductor structure with a current return encompassing a coil
Grant 8,860,180 - Jing , et al. October 14, 2
2014-10-14
Injection-controlled-locked phase-locked loop
Grant 8,841,948 - Chien , et al. September 23, 2
2014-09-23
Plesiochronous clock generation for parallel wireline transceivers
Grant 8,836,391 - Upadhyaya , et al. September 16, 2
2014-09-16
Resonator circuit and method of generating a resonating output signal
Grant 8,717,115 - Upadhyaya May 6, 2
2014-05-06
Inductor Structure With Pre-defined Current Return
App 20140117494 - Jing; Jing ;   et al.
2014-05-01
Phase lock loop with injection pulse control
Grant 8,710,883 - Fang , et al. April 29, 2
2014-04-29
Plesiochronous Clock Generation For Parallel Wireline Transceivers
App 20140091843 - Upadhyaya; Parag ;   et al.
2014-04-03
Inductor having a deep-well noise isolation shield
Grant 8,686,539 - Kireev , et al. April 1, 2
2014-04-01
Symmetrical center tap inductor structure
Grant 8,592,943 - Wu , et al. November 26, 2
2013-11-26
Resonator Circuit And Method Of Generating A Resonating Output Signal
App 20130181783 - Upadhyaya; Parag
2013-07-18
Interdigitated Capacitor Having Digits Of Varying Width
App 20130063861 - Wu; Zhaoyin D. ;   et al.
2013-03-14
Multiple-loop symmetrical inductor
Grant 8,358,192 - Kireev , et al. January 22, 2
2013-01-22
Symmetrical Center Tap Inductor Structure
App 20120241904 - Wu; Zhaoyin D. ;   et al.
2012-09-27
Tunable resonant circuit in an integrated circuit
Grant 8,269,566 - Upadhyaya , et al. September 18, 2
2012-09-18
Multiple-loop Symmetrical Inductor
App 20120212315 - Kireev; Vassili ;   et al.
2012-08-23
Multiple-loop Symmetrical Inductor
App 20120092119 - Kireev; Vassili ;   et al.
2012-04-19
Tunable Resonant Circuit In An Integrated Circuit
App 20120092081 - Upadhyaya; Parag ;   et al.
2012-04-19

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