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name:-0.37229585647583
name:-0.086962938308716
Uniquify IP Company, LLC Patent Filings

Uniquify IP Company, LLC

Patent Applications and Registrations

Patent applications and USPTO patent grants for Uniquify IP Company, LLC.The latest application filed is for "continuous adaptive data capture optimization for interface circuits".

Company Profile
9.11.7
  • Uniquify IP Company, LLC - San Francisco CA US
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Continuous Adaptive Data Capture Optimization For Interface Circuits
App 20210209043 - Lee; Jung ;   et al.
2021-07-08
Double Data Rate (ddr) Memory Controller Apparatus And Method
App 20200321044 - Gopalan; Mahesh ;   et al.
2020-10-08
Double data rate (DDR) memory controller apparatus and method
Grant 10,734,061 - Gopalan , et al.
2020-08-04
Double data rate (DDR) memory controller apparatus and method
Grant 10,586,585 - Gopalan , et al.
2020-03-10
Double Data Rate (ddr) Memory Controller Apparatus And Method
App 20200020381 - Gopalan; Mahesh ;   et al.
2020-01-16
Continuous Adaptive Data Capture Optimization For Interface Circuits
App 20190286591 - Lee; Jung ;   et al.
2019-09-19
Double Data Rate (ddr) Memory Controller Apparatus And Method
App 20190206479 - Gopalan; Mahesh ;   et al.
2019-07-04
Double data rate (DDR) memory controller apparatus and method
Grant 10,269,408 - Gopalan , et al.
2019-04-23
Double data rate (DDR) memory controller apparatus and method
Grant 10,242,730 - Gopalan , et al.
2019-03-26
Method for calibrating capturing read data in a read data path for a DDR memory interface circuit
Grant 10,229,729 - Gopalan , et al.
2019-03-12
Double Data Rate (ddr) Memory Controller Apparatus And Method
App 20180336942 - Gopalan; Mahesh ;   et al.
2018-11-22
Double Data Rate (ddr) Memory Controller Apparatus And Method
App 20180277195 - Gopalan; Mahesh ;   et al.
2018-09-27
Method for calibrating capturing read data in a read data path for a DDR memory interface circuit
Grant 10,032,502 - Gopalan , et al. July 24, 2
2018-07-24

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