Ulrich; Hanno

Patent Applications and Registrations

Patent applications and USPTO patent grants for Ulrich; Hanno.The latest application filed is for "granting exclusive cache access using locality cache coherency state".

Company Profile

2.15.12

Ulrich; Hanno - Tuebingen DE
Ulrich; Hanno - Boeblingen DE

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Dual/multi-mode processor pipelines sampling Grant 10,572,304 - Berger , et al. Feb	2020-02-25
Granting exclusive cache access using locality cache coherency state Grant 10,572,385 - Bronson , et al. Feb	2020-02-25
Dual/multi-mode processor pipeline sampling Grant 10,176,013 - Berger , et al. J	2019-01-08
Granting Exclusive Cache Access Using Locality Cache Coherency State App 20180101474 - Bronson; Timothy C. ; et al.	2018-04-12
Granting exclusive cache access using locality cache coherency state Grant 9,852,071 - Bronson , et al. December 26, 2	2017-12-26
Granting exclusive cache access using locality cache coherency state Grant 9,798,663 - Bronson , et al. October 24, 2	2017-10-24
Operating on translation look-aside buffers in a multiprocessor environment Grant 9,372,805 - Heller , et al. June 21, 2	2016-06-21
Granting Exclusive Cache Access Using Locality Cache Coherency State App 20160110288 - Bronson; Timothy C. ; et al.	2016-04-21
Granting Exclusive Cache Access Using Locality Cache Coherency State App 20160110287 - Bronson; Timothy C. ; et al.	2016-04-21
Dual/multi-mode Processor Pipeline Sampling App 20150261533 - Berger; Deanna Postles Dunn ; et al.	2015-09-17
Dual/multi-mode Processor Pipeline Sampling App 20150261569 - Berger; Deanna Postles Dunn ; et al.	2015-09-17
Memory ordered store system in a multiprocessor computer system Grant 8,850,129 - Hagspiel , et al. September 30, 2	2014-09-30
Providing Multiple Quiesce State Machines In A Computing Environment App 20140025922 - Heller; Lisa C. ; et al.	2014-01-23
Providing multiple quiesce state machines in a computing environment Grant 8,572,624 - Heller , et al. October 29, 2	2013-10-29
Method, system and computer program product for generalized LRU in cache and memory performance analysis and modeling Grant 8,566,529 - Hutton , et al. October 22, 2	2013-10-22
Method, system and computer program product for enhanced shared store buffer management scheme with limited resources for optimized performance Grant 8,090,883 - Strait , et al. January 3, 2	2012-01-03
Memory Ordered Store System In A Multiprocessor Computer System App 20110320743 - Hagspiel; Norbert ; et al.	2011-12-29
Method, System and Computer Program Product for Enhanced Shared Store Buffer Management Scheme with Limited Resources for Optimized Performance App 20100325321 - Strait; Gary E. ; et al.	2010-12-23
System, Method And Computer Program Product For Providing Multiple Quiesce State Machines App 20090217269 - Heller; Lisa C. ; et al.	2009-08-27
Method, System And Computer Program Product For Generalized Lru In Cache And Memory Performance Analysis And Modeling App 20090204767 - Hutton; David S. ; et al.	2009-08-13
Feedback process to model CP utilization in multi-processor performance models Grant 7,324,934 - Ulrich January 29, 2	2008-01-29
Interleave pre-checking in front of shared caches with pipelined access Grant 7,174,426 - Ulrich February 6, 2	2007-02-06
Interleave pre-checking in front of shared caches with pipelined access App 20050027942 - Ulrich, Hanno	2005-02-03
Feedback process to model CP utilization multi-processor performance models App 20040002839 - Ulrich, Hanno	2004-01-01

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