Ueda; Tadayoshi

Patent Applications and Registrations

Patent applications and USPTO patent grants for Ueda; Tadayoshi.The latest application filed is for "excess voltage protection circuit, method of protecting a circuit from excess voltage, and semiconductor apparatus having the excess voltage protection circuit".

Company Profile

0.8.8

Ueda; Tadayoshi - Hyogo JP
Ueda; Tadayoshi - Hyogo-ken JP

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Excess voltage protection circuit, method of protecting a circuit from excess voltage, and semiconductor apparatus having the excess voltage protection circuit Grant 7,864,495 - Ueda January 4, 2	2011-01-04
Overvoltage protection circuit and electronic device Grant 7,719,810 - Ueda May 18, 2	2010-05-18
DC converter with halt mode setting means Grant 7,701,187 - Manabe , et al. April 20, 2	2010-04-20
Excess Voltage Protection Circuit, Method Of Protecting A Circuit From Excess Voltage, And Semiconductor Apparatus Having The Excess Voltage Protection Circuit App 20090091872 - Ueda; Tadayoshi	2009-04-09
Power supply system and method for supplying power to CPU providing power saving mode Grant 7,512,821 - Ueda March 31, 2	2009-03-31
DC converter with halt mode setting means App 20080272759 - Manabe; Katsuhiko ; et al.	2008-11-06
DC converter with halt mode setting means Grant 7,408,334 - Manabe , et al. August 5, 2	2008-08-05
Overvoltage protection circuit and electronic device App 20070291432 - Ueda; Tadayoshi	2007-12-20
DC converter with halt mode setting means App 20070145963 - Manabe; Katsuhiko ; et al.	2007-06-28
DC converter with halt mode setting means Grant 7,193,400 - Manabe , et al. March 20, 2	2007-03-20
DC converter with halt mode setting means Grant 7,075,279 - Manabe , et al. July 11, 2	2006-07-11
DC converter with halt mode setting means App 20060125459 - Manabe; Katsuhiko ; et al.	2006-06-15
DC converter with halt mode setting means App 20060001411 - Manabe; Katsuhiko ; et al.	2006-01-05
DC converter with halt mode setting means Grant 6,922,043 - Manabe , et al. July 26, 2	2005-07-26
DC converter with halt mode setting means App 20040104715 - Manabe, Katsuhiko ; et al.	2004-06-03
Amplifying circuit, speaker system, and mobile information terminal employing amplifying circuit App 20040098632 - Ueda, Tadayoshi	2004-05-20

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