Uchida; Akihisa

Patent Applications and Registrations

Patent applications and USPTO patent grants for Uchida; Akihisa.The latest application filed is for "semiconductor device".

Company Profile

0.15.6

Uchida; Akihisa - Kanagawa JP
Uchida; Akihisa - Kokubunji JP
Uchida; Akihisa - Higashiyamato JP
Uchida; Akihisa - Tachikawa JP
Uchida; Akihisa - Koganei JP
Uchida; Akihisa - Tokyo JP

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Semiconductor device Grant 9,503,018 - Tsutsumi , et al. November 22, 2	2016-11-22
Semiconductor Device App 20160142011 - TSUTSUMI; Toshiaki ; et al.	2016-05-19
Semiconductor device Grant 9,252,793 - Tsutsumi , et al. February 2, 2	2016-02-02
Semiconductor Device App 20130314165 - Tsutsumi; Toshiaki ; et al.	2013-11-28
Method Of Manufacturing A Semiconductor Device And A Semiconductor Device App 20080258177 - IKEDA; Hiroyuki ; et al.	2008-10-23
Method of manufacturing a semiconductor device and a semiconductor device App 20060214721 - Ikeda; Hiroyuki ; et al.	2006-09-28
Method of manufacturing a semiconductor device Grant 7,073,147 - Ikeda , et al. July 4, 2	2006-07-04
Method of manufacturing a semiconductor device App 20040157378 - Ikeda, Hiroyuki ; et al.	2004-08-12
Semiconductor integrated circuit device and digital processor employing the same Grant 5,388,073 - Usami , et al. February 7, 1	1995-02-07
Semiconductor integrated circuit device having circuit inspection function Grant 5,351,211 - Higeta , et al. September 27, 1	1994-09-27
Semiconductor integrated circuit device forming on a common substrate MISFETs isolated by a field oxide and bipolar transistors isolated by a groove Grant 5,214,302 - Uchida , et al. May 25, 1	1993-05-25
Process of manufacturing semiconductor integrated circuit device having trench and field isolation regions Grant 5,141,888 - Kawaji , et al. August 25, 1	1992-08-25
Method of fabricating a semiconductor substrate, and semiconductor device, having thick oxide films and groove isolation Grant 5,084,402 - Uchida , et al. * January 28, 1	1992-01-28
Bipolar SRAM having word lines as vertically stacked pairs of conductive lines parallelly formed with holding current lines Grant 5,029,127 - Uchida , et al. July 2, 1	1991-07-02
Process of manufacturing semiconductor integrated circuit device and product formed thereby Grant 5,011,788 - Kawaji , et al. April 30, 1	1991-04-30
Semiconductor integrated circuit with dummy pedestals Grant 4,949,162 - Tamaki , et al. August 14, 1	1990-08-14
Method for fabricating a semiconductor integrated circuit device having thick oxide films and groove etch and refill Grant 4,853,343 - Uchida , et al. August 1, 1	1989-08-01
Semiconductor IC with dual groove isolation Grant 4,819,054 - Kawaji , et al. April 4, 1	1989-04-04
Isolation regions formed by locos followed with groove etch and refill Grant 4,746,963 - Uchida , et al. May 24, 1	1988-05-24

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