loadpatents
name:-0.0044598579406738
name:-0.015778779983521
name:-0.0031769275665283
Tzeng; Ping-San Patent Filings

Tzeng; Ping-San

Patent Applications and Registrations

Patent applications and USPTO patent grants for Tzeng; Ping-San.The latest application filed is for "glitch power analysis and optimization engine".

Company Profile
3.14.3
  • Tzeng; Ping-San - Fremont CA
  • Tzeng; Ping-San - San Jose CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Integrated simulator and analysis and optimization engine
Grant 11,361,137 - Wu , et al. June 14, 2
2022-06-14
Integrated Simulator And Analysis And Optimization Engine
App 20210383045 - Wu; Yang ;   et al.
2021-12-09
Glitch Power Analysis And Optimization Engine
App 20210384901 - Bai; Geng ;   et al.
2021-12-09
Vias With Multiconnection Via Structures
App 20200387581 - Tzeng; Ping-San ;   et al.
2020-12-10
Vias with multiconnection via structures
Grant 10,853,553 - Tzeng , et al. December 1, 2
2020-12-01
Sibling wire routing
Grant 10,776,554 - Tzeng , et al. Sept
2020-09-15
Graph-based timing analysis timing calibration
Grant 10,691,854 - Wang , et al.
2020-06-23
Local path-based analysis for circuit place and route optimization
Grant 10,534,883 - Bai , et al. Ja
2020-01-14
Circuit place and route optimization based on path-based timing analysis
Grant 10,534,878 - Bai , et al. Ja
2020-01-14
Multimode circuit place and route optimization
Grant 10,296,700 - Bai , et al.
2019-05-21
In-hierarchy circuit analysis and modification
Grant 9,536,036 - Tzeng January 3, 2
2017-01-03
In-hierarchy circuit analysis and modification for circuit instances
Grant 9,177,090 - Tzeng November 3, 2
2015-11-03
Natively color-aware double patterning technology (DPT) compliant routing
Grant 8,935,639 - Tzeng January 13, 2
2015-01-13
In-hierarchy circuit analysis and modification
Grant 8,793,633 - Tzeng July 29, 2
2014-07-29
In-hierarchy circuit analysis and modification
Grant 8,566,765 - Tzeng October 22, 2
2013-10-22
Method for automatic clock qualifier selection in reprogrammable hardware emulation systems
Grant 5,715,172 - Tzeng February 3, 1
1998-02-03

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