loadpatents
name:-0.029288053512573
name:-0.024585008621216
name:-0.00086212158203125
Tuntasood; Prateep Patent Filings

Tuntasood; Prateep

Patent Applications and Registrations

Patent applications and USPTO patent grants for Tuntasood; Prateep.The latest application filed is for "method of forming memory array and logic devices".

Company Profile
0.22.20
  • Tuntasood; Prateep - San Jose CA
  • Tuntasood; Prateep - Santa Clara CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Method of forming memory array and logic devices
Grant 9,673,208 - Kim , et al. June 6, 2
2017-06-06
Method Of Forming Memory Array And Logic Devices
App 20170103991 - KIM; JINHO ;   et al.
2017-04-13
Non-volatile Memory Cells With Enhanced Channel Region Effective Width, And Method Of Making Same
App 20140264539 - Do; Nhan ;   et al.
2014-09-18
FIN-FET non-volatile memory cell, and an array and method of manufacturing
Grant 8,461,640 - Hu , et al. June 11, 2
2013-06-11
Method for erasing a flash memory cell or an array of such cells having improved erase coupling ratio
Grant 7,974,136 - Chern , et al. July 5, 2
2011-07-05
FIN-FET Non-Volatile Memory Cell, And An Array And Method Of Manufacturing
App 20110057247 - Hu; Yaw Wen ;   et al.
2011-03-10
Array of contactless non-volatile memory cells
Grant 7,800,159 - Widjaja , et al. September 21, 2
2010-09-21
Method for Erasing a Flash Memory Cell or an Array of Such Cells Having Improved Erase Coupling Ratio
App 20100157687 - Chern; Geeng-Chuan Michael ;   et al.
2010-06-24
Process of fabricating flash memory with enhanced program and erase coupling
Grant 7,718,488 - Chen , et al. May 18, 2
2010-05-18
Method for erasing a flash memory cell or an array of such cells having improved erase coupling ratio
Grant 7,668,013 - Chern , et al. February 23, 2
2010-02-23
NAND flash memory with nitride charge storage gates and fabrication process
Grant 7,646,641 - Chen , et al. January 12, 2
2010-01-12
NOR flash memory
Grant 7,598,561 - Chen , et al. October 6, 2
2009-10-06
Method For Erasing A Flash Memory Cell Or An Array Of Such Cells Having Improved Erase Coupling Ratio
App 20090201744 - Chern; Geeng-Chuan Michael ;   et al.
2009-08-13
Array Of Non-volatile Memory Cells
App 20090108328 - WIDJAJA; YUNIARTO ;   et al.
2009-04-30
NAND flash memory with densely packed memory gates and fabrication process
Grant 7,501,321 - Tuntasood , et al. March 10, 2
2009-03-10
NOR Flash Memory and Fabrication Process
App 20070257299 - Chen; Bomy ;   et al.
2007-11-08
Self-aligned split-gate NAND flash memory and fabrication process
Grant 7,217,621 - Chen , et al. May 15, 2
2007-05-15
Method and apparatus for reducing operation disturbance
Grant 7,215,573 - Liu , et al. May 8, 2
2007-05-08
Method and apparatus for reducing operation disturbance
App 20070047298 - Liu; Tseng-Yi ;   et al.
2007-03-01
NAND Flash Memory with Densely Packed Memory Gates and Fabrication Process
App 20070032018 - Tuntasood; Prateep ;   et al.
2007-02-08
Process of Fabricating Flash Memory with Enhanced Program and Erase Coupling
App 20060203552 - Chen; Chiou-Feng ;   et al.
2006-09-14
Flash memory with enhanced program and erase coupling and process of fabricating the same
Grant 7,046,552 - Chen , et al. May 16, 2
2006-05-16
Flash memory with trench select gate and fabrication process
Grant 7,037,787 - Fan , et al. May 2, 2
2006-05-02
Self-aligned split-gate NAND flash memory and fabrication process
App 20060068529 - Chen; Chiou-Feng ;   et al.
2006-03-30
Self-aligned split-gate NAND flash memory and fabrication process
Grant 6,992,929 - Chen , et al. January 31, 2
2006-01-31
NAND flash memory with densely packed memory gates and fabrication process
App 20060017085 - Tuntasood; Prateep ;   et al.
2006-01-26
NAND flash memory with nitride charge storage gates and fabrication process
App 20050276106 - Chen, Chiou-Feng ;   et al.
2005-12-15
Self-aligned split-gate NAND flash memory and fabrication process
App 20050207225 - Chen, Chiou-Feng ;   et al.
2005-09-22
Flash memory with enhanced program and erase coupling and process of fabricating the same
App 20050207199 - Chen, Chiou-Feng ;   et al.
2005-09-22
Flash memory with trench select gate and fabrication process
App 20050146937 - Fan, Der-Tsyr ;   et al.
2005-07-07
NAND flash memory with enhanced program and erase performance, and fabrication process
App 20050145923 - Chen, Chiou-Feng ;   et al.
2005-07-07
Flash memory with trench select gate and fabrication process
Grant 6,894,339 - Fan , et al. May 17, 2
2005-05-17
Self-aligned split-gate NAND flash memory and fabrication process
Grant 6,885,586 - Chen , et al. April 26, 2
2005-04-26
Flash memory with trench select gate and fabrication process
App 20040130947 - Fan, Der-Tsyr ;   et al.
2004-07-08
Flash memory cells with separated self-aligned select and erase gates, and process of fabrication
Grant 6,747,310 - Fan , et al. June 8, 2
2004-06-08
Flash memory cells with separated self-aligned select and erase gates, and process of fabrication
App 20040065917 - Fan, Der-Tsyr ;   et al.
2004-04-08
Self-aligned split-gate NAND flash memory and fabrication process
App 20040057286 - Chen, Chiou-Feng ;   et al.
2004-03-25
Method for fabricating tunnel window in EEPROM cell with reduced cell pitch
Grant 6,171,907 - Tuntasood January 9, 2
2001-01-09
Method for simultaneously fabricating bipolar and complementary field effect transistors using a minimal number of masks
Grant 5,023,193 - Manoliu , et al. June 11, 1
1991-06-11
Method of manufacturing a polysilicon emitter and a polysilicon gate using the same etch of polysilicon on a thin gate oxide
Grant 5,001,081 - Tuntasood , et al. March 19, 1
1991-03-19
Method of fabricating high performance BiCMOS structures having poly emitters and silicided bases
Grant 4,727,046 - Tuntasood , et al. February 23, 1
1988-02-23

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