Tu; Che-Hao
Patent Applications and Registrations
Patent applications and USPTO patent grants for Tu; Che-Hao.The latest application filed is for "hard mask removal method".
- Tu; Che-Hao - Hsinchu TW
- Tu; Che-Hao - Hsinchu City TW
- Tu; Che-Hao - Hsin-Chu TW
| Patent | Date |
|---|---|
| Hard Mask Removal Method App 20210225657 - Tu; Che-Hao ; et al. | 2021-07-22 |
| Forming Gate Line-end Of Semiconductor Structures App 20210166972 - CHUNG; Che-Liang ; et al. | 2021-06-03 |
| Hard mask removal method Grant 10,971,370 - Tu , et al. April 6, 2 | 2021-04-06 |
| Forming gate line-end of semiconductor structures Grant 10,943,822 - Chung , et al. March 9, 2 | 2021-03-09 |
| System and Method of Chemical Mechanical Polishing App 20210023678 - Liu; Chih-Wen ; et al. | 2021-01-28 |
| System and method of chemical mechanical polishing Grant 10,800,004 - Liu , et al. October 13, 2 | 2020-10-13 |
| Hard Mask Removal Method App 20200118827 - Tu; Che-Hao ; et al. | 2020-04-16 |
| System And Method Of Chemical Mechanical Polishing App 20200101582 - Liu; Chih-Wen ; et al. | 2020-04-02 |
| Zone-based Cmp Target Control App 20200094369 - Chung; Che-Liang ; et al. | 2020-03-26 |
| Hard mask removal method Grant 10,510,552 - Tu , et al. Dec | 2019-12-17 |
| Forming Gate Line-end Of Semiconductor Structures App 20190287852 - Chung; Che-Liang ; et al. | 2019-09-19 |
| Hard Mask Removal Method App 20180240679 - Tu; Che-Hao ; et al. | 2018-08-23 |
| Hard mask removal method Grant 9,960,050 - Tu , et al. May 1, 2 | 2018-05-01 |
| Surface treatment in a chemical mechanical process Grant 9,941,109 - Liu , et al. April 10, 2 | 2018-04-10 |
| Asymmetric application of pressure to a wafer during a CMP process Grant 9,922,837 - Liu , et al. March 20, 2 | 2018-03-20 |
| Surface Treatment in a Chemical Mechanical Process App 20180005840 - Liu; Chih-Wen ; et al. | 2018-01-04 |
| Asymmetric Application of Pressure to a Wafer During a CMP Process App 20170256414 - Liu; Chih-Wen ; et al. | 2017-09-07 |
| Mechanisms for forming oxide layer over exposed polysilicon during a chemical mechanical polishing (CMP) process Grant 9,711,374 - Tu , et al. July 18, 2 | 2017-07-18 |
| Composite structure for gate level inter-layer dielectric Grant 9,595,450 - Tu , et al. March 14, 2 | 2017-03-14 |
| Composite Structure for Gate Level Inter-Layer Dielectric App 20150187594 - Tu; Che-Hao ; et al. | 2015-07-02 |
| Planarization process for semiconductor device fabrication Grant 8,975,179 - Tu , et al. March 10, 2 | 2015-03-10 |
| Hard Mask Removal Method App 20150037978 - TU; CHE-HAO ; et al. | 2015-02-05 |
| Mechanisms For Forming Oxide Layer Over Exposed Polysilicon During A Chemical Mechanical Polishing (cmp) Process App 20140370696 - TU; Che-Hao ; et al. | 2014-12-18 |
| Gate height loss improvement for a transistor Grant 8,598,028 - Tu , et al. December 3, 2 | 2013-12-03 |
| Gate Height Loss Improvement For A Transistor App 20130164930 - Tu; Che-Hao ; et al. | 2013-06-27 |
| Planarization Process For Semiconductor Device Fabrication App 20130095644 - Tu; Che-Hao ; et al. | 2013-04-18 |
uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.
While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.
All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.
| 