| Patent | Date |
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Semiconductor memory device
Grant 11,200,945 - Kubo , et al. December 14, 2 | 2021-12-14 |
Semiconductor memory device comprising an interface conforming to JEDEC standard and control device therefor
Grant 10,991,418 - Haraguchi , et al. April 27, 2 | 2021-04-27 |
Control Device, Semiconductor Memory Device And Control Method For A Semiconductor Memory Device
App 20200135261 - Haraguchi; Masaru ; et al. | 2020-04-30 |
Semiconductor Memory Device
App 20190378561 - KUBO; TAKASHI ; et al. | 2019-12-12 |
Semiconductor device and level conversion circuit
Grant 7,288,965 - Yamasaki , et al. October 30, 2 | 2007-10-30 |
Semiconductor device and level conversion circuit
App 20070103197 - Yamasaki; Kyoji ; et al. | 2007-05-10 |
Semiconductor device and level conversion circuit
Grant 7,161,387 - Yamasaki , et al. January 9, 2 | 2007-01-09 |
Semiconductor memory device driven with low voltage
Grant 7,102,935 - Miki , et al. September 5, 2 | 2006-09-05 |
Semiconductor memory device having dummy word line
Grant 7,072,204 - Tsukikawa , et al. July 4, 2 | 2006-07-04 |
Semiconductor memory device having dummy word line
App 20050219893 - Tsukikawa, Yasuhiko ; et al. | 2005-10-06 |
Semiconductor device with reduced terminal input capacitance
Grant 6,934,204 - Itou , et al. August 23, 2 | 2005-08-23 |
Semiconductor memory device having twin-cell units
Grant 6,903,961 - Tsukikawa , et al. June 7, 2 | 2005-06-07 |
Semiconductor memory device driven with low voltage
App 20050088881 - Miki, Takeo ; et al. | 2005-04-28 |
Semiconductor device and level conversion circuit
App 20050068062 - Yamasaki, Kyoji ; et al. | 2005-03-31 |
Semiconductor memory device with memory cells arranged in high density
Grant 6,867,994 - Tsukikawa March 15, 2 | 2005-03-15 |
Semiconductor memory device with shortened connection length among memory block, data buffer and data bus
Grant 6,787,859 - Itou , et al. September 7, 2 | 2004-09-07 |
Semiconductor memory device with memory cells arranged in high density
App 20040156255 - Tsukikawa, Yasuhiko | 2004-08-12 |
Semiconductor memory device having twin-cell units
App 20040141361 - Tsukikawa, Yasuhiko ; et al. | 2004-07-22 |
Semiconductor memory circuit having normal operation mode and burn-in test mode
Grant 6,735,133 - Tsukikawa May 11, 2 | 2004-05-11 |
Configuration for generating a clock including a delay circuit and method thereof
Grant 6,727,738 - Tsukikawa April 27, 2 | 2004-04-27 |
Semiconductor memory device having nonvolatile memory cell of high operating stability
Grant 6,717,841 - Tsukikawa April 6, 2 | 2004-04-06 |
Multi-valued logical circuit with less latch-up
Grant 6,700,406 - Tsukikawa March 2, 2 | 2004-03-02 |
Semiconductor memory device capable of switching output data width
Grant 6,687,174 - Maruyama , et al. February 3, 2 | 2004-02-03 |
Semiconductor memory device
App 20030193824 - Tsukikawa, Yasuhiko ; et al. | 2003-10-16 |
Semiconductor memory device having nonvolatile memory cell of high operating stability
App 20030161177 - Tsukikawa, Yasuhiko | 2003-08-28 |
Semiconductor memory device capable of switching output data width
App 20030103396 - Maruyama, Yukiko ; et al. | 2003-06-05 |
Semiconductor device with reduced terminal input capacitance
App 20030101374 - Itou, Takashi ; et al. | 2003-05-29 |
Semiconductor memory device
App 20030057500 - Itou, Takashi ; et al. | 2003-03-27 |
Configuration for generating a clock including a delay circuit and method thereof
App 20020075047 - Tsukikawa, Yasuhiko | 2002-06-20 |
Delay circuit having delay time free from influence of operation environment
Grant 6,121,812 - Tsukikawa September 19, 2 | 2000-09-19 |
Semiconductor memory device capable of executing earlier command operation in test mode
Grant 6,061,285 - Tsukikawa May 9, 2 | 2000-05-09 |
Semiconductor memory device permitting large output current from output buffer
Grant 5,982,705 - Tsukikawa November 9, 1 | 1999-11-09 |
Synchronous semiconductor device having circuitry capable of surely resetting test mode
Grant 5,905,690 - Sakurai , et al. May 18, 1 | 1999-05-18 |
Semiconductor memory device clamping the overshoot and undershoot of input signal by circuit with PN junction
Grant 5,905,679 - Tsukikawa May 18, 1 | 1999-05-18 |
Semiconductor memory device and test method therefor
Grant 5,761,141 - Kobashi , et al. June 2, 1 | 1998-06-02 |
Semiconductor memory device comprising address transition detecting circuit having stable response characteristic for address signal conversion
Grant 5,715,212 - Tanida , et al. February 3, 1 | 1998-02-03 |
Complementary differential amplifier in which direct current amplification gain can be set arbitrarily and semiconductor memory divice using the same
Grant 5,696,726 - Tsukikawa December 9, 1 | 1997-12-09 |
Semiconductor memory device having a redundant row and a redundant column which can be accessed prior to substitution
Grant 5,652,725 - Suma , et al. July 29, 1 | 1997-07-29 |
Integrated semiconductor device
Grant 5,563,840 - Hayakawa , et al. October 8, 1 | 1996-10-08 |
Charge pump circuit having an improved charge pumping efficiency
Grant 5,394,365 - Tsukikawa February 28, 1 | 1995-02-28 |
Method and apparatus for writing oxide film
Grant 5,014,646 - Ito , et al. May 14, 1 | 1991-05-14 |
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