Tsuchiya; Takehiko

Patent Applications and Registrations

Patent applications and USPTO patent grants for Tsuchiya; Takehiko.The latest application filed is for "semiconductor integrated circuit, interconnect, and computer readable medium storing medium storing control program".

Company Profile

0.13.10

Tsuchiya; Takehiko - Kanagawa JP
Tsuchiya; Takehiko - Yokohama N/A JP
Tsuchiya; Takehiko - Yokohama-shi JP
Tsuchiya; Takehiko - Kanagawa-ken JP
Tsuchiya; Takehiko - Tokyo JP
Tsuchiya; Takehiko - Musashino JP

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
System and method for verifying and maintaining consistency between an intended power mode and an actual power mode in a semiconductor integrated circuit Grant 8,856,556 - Tsuchiya October 7, 2	2014-10-07
Semiconductor integrated circuit, interconnect, and computer readable medium storing medium storing control program Grant 8,700,927 - Tsuchiya April 15, 2	2014-04-15
Verification device of semiconductor integrated circuit, verification method of semiconductor integrated circuit, and computer readable medium storing verification program of semiconductor integrated circuit Grant 8,516,419 - Tsuchiya August 20, 2	2013-08-20
Semiconductor Integrated Circuit, Interconnect, And Computer Readable Medium Storing Medium Storing Control Program App 20120066521 - Tsuchiya; Takehiko	2012-03-15
Apparatus and method for analyzing circuit specification description design Grant 7,908,577 - Tsuchiya March 15, 2	2011-03-15
Semiconductor Integrated Circuit Design Support System, Design Support Method For Semiconductor Integrated Circuit, And Semiconductor Integrated Circuit App 20100295606 - Tsuchiya; Takehiko	2010-11-25
Verification Device Of Semiconductor Integrated Circuit, Verification Method Of Semiconductor Integrated Circuit, And Computer Readable Medium Storing Verification Program Of Semiconductor Integrated Circuit App 20090293026 - Tsuchiya; Takehiko	2009-11-26
Method and program for supporting register-transfer-level design of semiconductor integrated circuit Grant 7,519,939 - Tsuchiya April 14, 2	2009-04-14
Apparatus And Method For Analyzing Circuit Specification Description Design App 20090064059 - Tsuchiya; Takehiko	2009-03-05
Circuit Design Verification Method And Apparatus And Computer Readable Medium App 20080288902 - Nishide; Takeo ; et al.	2008-11-20
System and method for design verification Grant 7,263,478 - Tsuchiya August 28, 2	2007-08-28
Method and Program for Supporting Register-Transfer-Level Design of Semiconductor Integrated Circuit App 20070143731 - Tsuchiya; Takehiko	2007-06-21
Method and program for supporting register-transfer-level design of semiconductor integrated circuit Grant 7,219,312 - Tsuchiya May 15, 2	2007-05-15
Circuit designing apparatus, circuit designing method, and computer readable recording medium storing a circuit designing program Grant 7,107,190 - Tsuchiya , et al. September 12, 2	2006-09-12
Method and program for supporting register-transfer-level design of semiconductor integrated circuit App 20050102647 - Tsuchiya, Takehiko	2005-05-12
Method and program for supporting register-transfer-level design of semiconductor integrated circuit Grant 6,851,102 - Tsuchiya February 1, 2	2005-02-01
LSI design verification apparatus, LSI design verification method, and LSI design verification program App 20030125920 - Matsuoka, Yoshiki ; et al.	2003-07-03
Method and program for supporting register-transfer-level design of semiconductor integrated circuit App 20030061573 - Tsuchiya, Takehiko	2003-03-27
Design verification device, method and memory media for integrated circuits Grant 6,449,750 - Tsuchiya September 10, 2	2002-09-10
Design verification system and method App 20020038203 - Tsuchiya, Takehiko	2002-03-28

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