loadpatents
name:-0.012741804122925
name:-0.42736291885376
name:-0.0061171054840088
Tseng; Ping-Sheng Patent Filings

Tseng; Ping-Sheng

Patent Applications and Registrations

Patent applications and USPTO patent grants for Tseng; Ping-Sheng.The latest application filed is for "common shared memory in a verification system".

Company Profile
0.21.7
  • Tseng; Ping-Sheng - Saratoga CA
  • Tseng; Ping-Sheng - Sunnyvale CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Systems and methods for handling DPI messages outgoing from an emulator system
Grant 11,308,008 - Poplack , et al. April 19, 2
2022-04-19
Common shared memory in a verification system
Grant 9,195,784 - Tseng , et al. November 24, 2
2015-11-24
Co-simulation methodology to address performance and runtime challenges of gate level simulations with, SDF timing using emulators
Grant 9,026,966 - Ramachandran , et al. May 5, 2
2015-05-05
Method and apparatus for simulating a circuit using timing insensitive glitch-free (TIGF) logic
Grant 8,244,512 - Tseng , et al. August 14, 2
2012-08-14
Method and apparatus for processing assertions in assertion-based verification of a logic design
Grant 8,161,439 - Lim , et al. April 17, 2
2012-04-17
Method and apparatus for implementing a task-based interface in a logic verification system
Grant 8,161,502 - Peng , et al. April 17, 2
2012-04-17
Common Shared Memory In A Verification System
App 20110307233 - Tseng; Ping-Sheng ;   et al.
2011-12-15
Method and apparatus for translating a verification process having recursion for implementation in a logic emulator
Grant 7,991,605 - Tseng , et al. August 2, 2
2011-08-02
Method and Apparatus for Implementing a Task-Based Interface in a Logic Verification System
App 20100083289 - Peng; Song ;   et al.
2010-04-01
Method And Apparatus For Processing Assertions In Assertion-Based Verification of A Logic Design
App 20090204931 - LIM; Amy ;   et al.
2009-08-13
Inter-chip communication system
Grant 7,512,728 - Tseng March 31, 2
2009-03-31
VCD-on-demand system and method
Grant 7,480,606 - Tseng , et al. January 20, 2
2009-01-20
Behavior processor system and method
App 20060117274 - Tseng; Ping-Sheng ;   et al.
2006-06-01
VCD-on-demand system and method
App 20050228630 - Tseng, Ping-Sheng ;   et al.
2005-10-13
Inter-chip communication system
App 20050102125 - Tseng, Ping-Sheng
2005-05-12
Memory mapping system and method
Grant 6,810,442 - Lin , et al. October 26, 2
2004-10-26
Emulation system with multiple asynchronous clocks
Grant 6,785,873 - Tseng August 31, 2
2004-08-31
Dynamic evaluation logic system and method
Grant 6,651,225 - Lin , et al. November 18, 2
2003-11-18
Inter-chip communication system
App 20020152060 - Tseng, Ping-Sheng
2002-10-17
Converification system and method
Grant 6,389,379 - Lin , et al. May 14, 2
2002-05-14
Timing-insensitive glitch-free logic system and method
Grant 6,321,366 - Tseng , et al. November 20, 2
2001-11-20
Simulation server system and method
Grant 6,134,516 - Wang , et al. October 17, 2
2000-10-17
Memory simulation system and method
Grant 6,026,230 - Lin , et al. February 15, 2
2000-02-15
Simulation/emulation system and method
Grant 6,009,256 - Tseng , et al. December 28, 1
1999-12-28
Simulator for simulating systems including mixed triggers
Grant 5,809,283 - Vaidyanathan , et al. September 15, 1
1998-09-15
Simulator including process levelization
Grant 5,784,593 - Tseng , et al. July 21, 1
1998-07-21

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