Tseng; Hsing-Huang

Patent Applications and Registrations

Patent applications and USPTO patent grants for Tseng; Hsing-Huang.The latest application filed is for "high quality thin dielectric layer and method of making same".

Company Profile

0.15.4

Tseng; Hsing-Huang - Austin TX

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Method of making a high quality thin dielectric layer Grant 7,001,852 - Luo , et al. February 21, 2	2006-02-21
High quality thin dielectric layer and method of making same App 20050245019 - Luo, Tien-Ying ; et al.	2005-11-03
Method for forming a dual gate oxide device using a metal oxide and resulting device Grant 6,787,421 - Gilmer , et al. September 7, 2	2004-09-07
Method for forming a dual gate oxide device using a metal oxide and resulting device App 20040032001 - Gilmer, David C. ; et al.	2004-02-19
Method for making a semiconductor device App 20020187651 - Reid, Kimberly G. ; et al.	2002-12-12
Process for forming a semiconductor device Grant 6,297,173 - Tobin , et al. October 2, 2	2001-10-02
Method To Locate Particles Of A Predetermined Species Within A Solid And Resulting Structures App 20010003381 - ORLOWSKI, MARIUS ; et al.	2001-06-14
Method for manufacturing a high dielectric constant gate oxide for use in semiconductor integrated circuits Grant 6,063,698 - Tseng , et al. May 16, 2	2000-05-16
Process for forming a semiconductor device Grant 5,972,804 - Tobin , et al. October 26, 1	1999-10-26
Method for making a dual-thickness gate oxide layer using a nitride/oxide composite region Grant 5,960,289 - Tsui , et al. September 28, 1	1999-09-28
Integrated circuit having a jet vapor deposition silicon nitride film and method of making the same Grant 5,731,238 - Cavins , et al. March 24, 1	1998-03-24
Method of formation of semiconductor gate dielectric Grant 5,726,087 - Tseng , et al. March 10, 1	1998-03-10
Methods of formation of semiconductor composite gate dielectric having multiple incorporated atomic dopants Grant 5,712,208 - Tseng , et al. January 27, 1	1998-01-27
Process for forming field isolation and a structure over a semiconductor substrate Grant 5,580,815 - Hsu , et al. December 3, 1	1996-12-03
Process for fabricating a MOSFET device having reduced reverse short channel effects Grant 5,552,332 - Tseng , et al. September 3, 1	1996-09-03
Process to incorporate nitrogen at an interface of a dielectric layer in a semiconductor device Grant 5,464,792 - Tseng , et al. November 7, 1	1995-11-07
Trench isolator structure in an integrated circuit Grant 5,436,488 - Poon , et al. July 25, 1	1995-07-25
Method of forming trench isolation structure in an integrated circuit Grant 5,387,540 - Poon , et al. February 7, 1	1995-02-07
Method for fabricating paired MOS transistors having a current-gain differential Grant 5,371,026 - Hayden , et al. December 6, 1	1994-12-06

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