TSAI; TSUNG-CHIEH
Patent Applications and Registrations
Patent applications and USPTO patent grants for TSAI; TSUNG-CHIEH.The latest application filed is for "semiconductor structure and method for manufacturing thereof".
Company Profile
8.32.36
- TSAI; TSUNG-CHIEH - HSIN-CHU COUNTY TW
- Tsai; Tsung-Chieh - Chu-Bei TW
- Tsai; Tsung-Chieh - Chu-Bei City TW
- Tsai; Tsung-Chieh - Tainan TW
- Tsai, Tsung-Chieh - Tainain TW
Patent Activity
| Patent | Date |
|---|---|
| Semiconductor Structure And Method For Manufacturing Thereof App 20220293590 - LIN; TA-WEI ; et al. | 2022-09-15 |
| Cell layout and structure Grant 11,281,835 - Hsieh , et al. March 22, 2 | 2022-03-22 |
| Different Scaling Ratio In Feol / Mol/ Beol App 20220068812 - Lee; Liang-Yao ; et al. | 2022-03-03 |
| Different scaling ratio in FEOL / MOL/ BEOL Grant 11,152,303 - Lee , et al. October 19, 2 | 2021-10-19 |
| Conductive line patterning Grant 10,998,304 - Liu , et al. May 4, 2 | 2021-05-04 |
| Gate-All-Around Device with Different Channel Semiconductor Materials and Method of Forming the Same App 20210098310 - Lu; Jhe-Ching ; et al. | 2021-04-01 |
| Cell Layout and Structure App 20200257842 - Hsieh; Tung-Heng ; et al. | 2020-08-13 |
| Cell layout and structure Grant 10,664,639 - Hsieh , et al. | 2020-05-26 |
| Different Scaling Ratio In Feol / Mol/ Beol App 20190287905 - Lee; Liang-Yao ; et al. | 2019-09-19 |
| Conductive Line Patterning App 20190244950 - Liu; Ru-Gun ; et al. | 2019-08-08 |
| Semiconductor device and manufacturing method thereof Grant 10,366,900 - Wu , et al. July 30, 2 | 2019-07-30 |
| Different scaling ratio in FEOL/ MOL/ BEOL Grant 10,325,849 - Lee , et al. | 2019-06-18 |
| Mask optimization for multi-layer contacts Grant 10,283,495 - Liu , et al. | 2019-05-07 |
| Conductive line patterning Grant 10,269,785 - Liu , et al. | 2019-04-23 |
| Cell Layout and Structure App 20180253522 - Hsieh; Tung-Heng ; et al. | 2018-09-06 |
| Semiconductor device, layout of semiconductor device, and method of manufacturing semiconductor device Grant 9,991,158 - Hsieh , et al. June 5, 2 | 2018-06-05 |
| Cell layout and structure Grant 9,984,191 - Hsieh , et al. May 29, 2 | 2018-05-29 |
| Semiconductor Device And Manufacturing Method Thereof App 20170278717 - WU; Juing-Yi ; et al. | 2017-09-28 |
| Method for preventing photoresist corner rounding effects Grant 9,746,783 - Lee , et al. August 29, 2 | 2017-08-29 |
| Implant region definition Grant 9,637,818 - Wu , et al. May 2, 2 | 2017-05-02 |
| Conductive Line Patterning App 20170025401 - Liu; Ru-Gun ; et al. | 2017-01-26 |
| Semiconductor device having a metal gate Grant 9,508,791 - Tsai , et al. November 29, 2 | 2016-11-29 |
| Conductive line patterning Grant 9,472,501 - Liu , et al. October 18, 2 | 2016-10-18 |
| Mask Optimization For Multi-Layer Contacts App 20160293590 - Liu; Ru-Gun ; et al. | 2016-10-06 |
| Semiconductor device and fabrication method thereof Grant 9,437,434 - Yeh , et al. September 6, 2 | 2016-09-06 |
| Mask optimization for multi-layer contacts Grant 9,391,056 - Liu , et al. July 12, 2 | 2016-07-12 |
| Different Scaling Ratio In Feol / Mol/ Beol App 20160155704 - Lee; Liang-Yao ; et al. | 2016-06-02 |
| Semiconductor Device Having A Metal Gate App 20160133693 - Tsai; Tsung-Chieh ; et al. | 2016-05-12 |
| Different scaling ratio in FEOL / MOL/ BEOL Grant 9,292,649 - Lee , et al. March 22, 2 | 2016-03-22 |
| Semiconductor Device, Layout Of Semiconductor Device, And Method Of Manufacturing Semiconductor Device App 20160079162 - HSIEH; Tung-Heng ; et al. | 2016-03-17 |
| Cell Layout and Structure App 20160063166 - Hsieh; Tung-Heng ; et al. | 2016-03-03 |
| Semiconductor device and fabrication method thereof Grant 9,236,379 - Tsai , et al. January 12, 2 | 2016-01-12 |
| Semiconductor device and fabrication method therefor Grant 9,230,962 - Tsai , et al. January 5, 2 | 2016-01-05 |
| Conductive Line Patterning App 20150333002 - Liu; Ru-Gun ; et al. | 2015-11-19 |
| Implant Region Definition App 20150322565 - Wu; Juing-Yi ; et al. | 2015-11-12 |
| Controlling Gate Formation for High Density Cell Layout App 20150318367 - Chuang; Harry Hak-Lay ; et al. | 2015-11-05 |
| Conductive line patterning Grant 9,136,168 - Liu , et al. September 15, 2 | 2015-09-15 |
| Implant region definition Grant 9,087,773 - Wu , et al. July 21, 2 | 2015-07-21 |
| Controlling gate formation for high density cell layout Grant 9,070,623 - Chuang , et al. June 30, 2 | 2015-06-30 |
| Method, system and software for accessing design rules and library of design features while designing semiconductor device layout Grant 9,047,437 - Chen , et al. June 2, 2 | 2015-06-02 |
| Different Scaling Ratio In Feol / Mol/ Beol App 20150143319 - Lee; Liang-Yao ; et al. | 2015-05-21 |
| Implant Region Definition App 20150072480 - Wu; Juing-Yi ; et al. | 2015-03-12 |
| Method For Preventing Photoresist Corner Rounding Effects App 20150050810 - Lee; Liang-Yao ; et al. | 2015-02-19 |
| Mask Optimization for Multi-Layer Contacts App 20150048457 - Liu; Ru-Gun ; et al. | 2015-02-19 |
| Conductive Line Patterning App 20150001734 - Liu; Ru-Gun ; et al. | 2015-01-01 |
| Semiconductor Device And Fabrication Method Thereof App 20140291741 - TSAI; Tsung-Chieh ; et al. | 2014-10-02 |
| Method, System And Software For Accessing Design Rules And Library Of Design Features While Designing Semiconductor Device Layout App 20140282294 - CHEN; Chin-An ; et al. | 2014-09-18 |
| Semiconductor Device And Fabrication Method Thereof App 20140203372 - YEH; Ming-Hsi ; et al. | 2014-07-24 |
| Method, system and software for accessing design rules and library of design features while designing semiconductor device layout Grant 8,769,475 - Chen , et al. July 1, 2 | 2014-07-01 |
| Semiconductor Device And Fabrication Method Therefor App 20140167178 - TSAI; Tsung-Chieh ; et al. | 2014-06-19 |
| Semiconductor device having a treated gate structure and fabrication method thereof Grant 8,703,594 - Yeh , et al. April 22, 2 | 2014-04-22 |
| Semiconductor device fabrication method Grant 8,685,808 - Tsai , et al. April 1, 2 | 2014-04-01 |
| Method, System And Software For Accessing Design Rules And Library Of Design Features While Designing Semiconductor Device Layout App 20130111418 - Chen; Chin-An ; et al. | 2013-05-02 |
| Semiconductor Device And Fabrication Method Thereof App 20130102138 - YEH; Ming-Hsi ; et al. | 2013-04-25 |
| Semiconductor Device And Fabrication Method Thereof App 20130075796 - TSAI; Tsung-Chieh ; et al. | 2013-03-28 |
| Controlling Gate Formation For High Density Cell Layout App 20110042750 - Chuang; Harry-Hak-Lay ; et al. | 2011-02-24 |
| Method for forming a high quality chemical oxide on a freshly cleaned silicon surface as a native oxide replacement Grant 6,878,578 - Twu , et al. April 12, 2 | 2005-04-12 |
| Electrostatic charge-free solvent-type dryer for semiconductor wafers Grant 6,647,998 - Twu , et al. November 18, 2 | 2003-11-18 |
| Moisture-controlled wafer storage container and method of using App 20030035713 - Tsai, Tsung-Chieh ; et al. | 2003-02-20 |
| Electrostatic charge-free solvent-type dryer for semiconductor wafers App 20020195130 - Twu, Jih-Churng ; et al. | 2002-12-26 |
| Semiconductor wafer support App 20020026900 - Huang, Cheng-Yi ; et al. | 2002-03-07 |
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