Tsai; Nan-Hsiung
Patent Applications and Registrations
Patent applications and USPTO patent grants for Tsai; Nan-Hsiung.The latest application filed is for "process for wafer thinning".
- Tsai; Nan-Hsiung - Shanghai CN
- Tsai, Nan-Hsiung - Hsinchu TW
- Tsai; Nan-Hsiung - Cupertino CA
- Tsai; Nan-Hsiung - Fremont CA
| Patent | Date |
|---|---|
| Process for wafer thinning Grant 7,371,664 - Tsai May 13, 2 | 2008-05-13 |
| Process For Wafer Thinning App 20080076265 - Tsai; Nan-Hsiung | 2008-03-27 |
| Trench capacitor and method of manufacturing the same App 20080014696 - Tsai; Nan-Hsiung | 2008-01-17 |
| Ion doping method to form source and drain Grant 7,282,417 - Tsai October 16, 2 | 2007-10-16 |
| High density memory structure App 20010028075 - Chen, Min-Liang ; et al. | 2001-10-11 |
| Semiconductor having self-aligned polysilicon electrode layer Grant 5,880,496 - Chen , et al. March 9, 1 | 1999-03-09 |
| Method of forming a bit-line and a capacitor structure in an integrated circuit Grant 5,792,686 - Chen , et al. August 11, 1 | 1998-08-11 |
| Resistor with side wall contact Grant 5,084,420 - Tsai January 28, 1 | 1992-01-28 |
| Integrated circuit resistor and method of fabrication Grant 4,446,613 - Beinglass , et al. May 8, 1 | 1984-05-08 |
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