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name:-0.011324882507324
name:-0.0096809864044189
name:-0.0069959163665771
TSAI; Han-Min Patent Filings

TSAI; Han-Min

Patent Applications and Registrations

Patent applications and USPTO patent grants for TSAI; Han-Min.The latest application filed is for "buried channel semiconductor device and method for manufacturing the same".

Company Profile
7.10.12
  • TSAI; Han-Min - Hsinchu City TW
  • Tsai; Han-Min - Hsin-Chu TW
  • Tsai; Han-Min - Hsinchu TW
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Buried Channel Semiconductor Device And Method For Manufacturing The Same
App 20210375862 - CHEN; Chia-Chung ;   et al.
2021-12-02
Display device comprising a dichroic reflection layer having a plurality of recessed portions disposed with a corresponding plurality of quantum dot blocks
Grant 11,181,778 - Kuo , et al. November 23, 2
2021-11-23
High-implant Channel Semiconductor Device And Method For Manufacturing The Same
App 20210344303 - CHEN; Chia-Chung ;   et al.
2021-11-04
Buried channel semiconductor device and method for manufacturing the same
Grant 11,094,694 - Chen , et al. August 17, 2
2021-08-17
FinFET Varactor with Low Threshold Voltage and Method of Making the Same
App 20210242197 - Tsai; Fu-Huan ;   et al.
2021-08-05
High-implant channel semiconductor device and method for manufacturing the same
Grant 11,063,559 - Chen , et al. July 13, 2
2021-07-13
FinFET varactor with low threshold voltage and method of making the same
Grant 10,991,687 - Tsai , et al. April 27, 2
2021-04-27
Buried Channel Semiconductor Device And Method For Manufacturing The Same
App 20200135730 - CHEN; Chia-Chung ;   et al.
2020-04-30
FinFET Varactor with Low Threshold Voltage and Method of Making the Same
App 20200126975 - Tsai; Fu-Huan ;   et al.
2020-04-23
Buried channel semiconductor device and method for manufacturing the same
Grant 10,529,711 - Chen , et al. J
2020-01-07
FinFET varactor with low threshold voltage and method of making the same
Grant 10,522,535 - Tsai , et al. Dec
2019-12-31
FinFET varactor with low threshold voltage and method of making the same
Grant 10,522,534 - Tsai , et al. Dec
2019-12-31
Display Device Having Dichroic Reflection Layer
App 20190250464 - Kuo; Ting-Yi ;   et al.
2019-08-15
FinFET Varactor with Low Threshold Voltage and Method of Making the Same
App 20180337173 - Tsai; Fu-Huan ;   et al.
2018-11-22
Buried Channel Semiconductor Device And Method For Manufacturing The Same
App 20170352660 - Chen; Chia-Chung ;   et al.
2017-12-07
FinFET Varactor with Low Threshold Voltage and Method of Making the Same
App 20170317073 - Tsai; Fu-Huan ;   et al.
2017-11-02
Bipolar junction transistor layout
Grant 9,780,089 - Tsai , et al. October 3, 2
2017-10-03
Buried channel semiconductor device and method for manufacturing the same
Grant 9,761,584 - Chen , et al. September 12, 2
2017-09-12
Bipolar Junction Transistor Layout
App 20170047323 - TSAI; Han-Min ;   et al.
2017-02-16
Buried Channel Semiconductor Device And Method For Manufacturing The Same
App 20160358911 - CHEN; Chia-Chung ;   et al.
2016-12-08
High-implant Channel Semiconductor Device And Method For Manufacturing The Same
App 20160358912 - CHEN; Chia-Chung ;   et al.
2016-12-08
Bipolar junction transistor layout
Grant 9,484,408 - Tsai , et al. November 1, 2
2016-11-01

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