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Alignment marks in substrate having through-substrate via (TSV)
Grant 10,910,267 - Chang , et al. February 2, 2 | 2021-02-02 |
Alignment Marks in Substrate Having Through-Substrate Via (TSV)
App 20200321249 - Chang; Hsin ; et al. | 2020-10-08 |
Alignment marks in substrate having through-substrate via (TSV)
Grant 10,692,764 - Chang , et al. | 2020-06-23 |
Alignment Marks in Substrate Having Through-Substrate Via (TSV)
App 20190131172 - Chang; Hsin ; et al. | 2019-05-02 |
Alignment marks in substrate having through-substrate via (TSV)
Grant 10,163,706 - Chang , et al. Dec | 2018-12-25 |
Through silicon via structure
Grant 9,997,497 - Yu , et al. June 12, 2 | 2018-06-12 |
Method for Through Silicon via Structure
App 20170221861 - Yu; Chen-Hua ; et al. | 2017-08-03 |
Method for through silicon via structure
Grant 9,633,900 - Yu , et al. April 25, 2 | 2017-04-25 |
Alignment mark and method of formation
Grant 9,478,480 - Tsai , et al. October 25, 2 | 2016-10-25 |
Through Silicon Via Structure and Method
App 20160181157 - Yu; Chen-Hua ; et al. | 2016-06-23 |
Through silicon via structure
Grant 9,299,676 - Yu , et al. March 29, 2 | 2016-03-29 |
Reconfigurable guide pin design for centering wafers having different sizes
Grant 9,099,515 - Chang , et al. August 4, 2 | 2015-08-04 |
Copper bump structures having sidewall protection layers
Grant 9,093,314 - Lin , et al. July 28, 2 | 2015-07-28 |
Through Silicon Via Structure and Method
App 20150137361 - Yu; Chen-Hua ; et al. | 2015-05-21 |
Alignment Marks in Substrate Having Through-Substrate Via (TSV)
App 20150118840 - Chang; Hsin ; et al. | 2015-04-30 |
Copper Bump Structures Having Sidewall Protection Layers
App 20150111342 - Lin; Jing-Cheng ; et al. | 2015-04-23 |
Double treatment on hard mask for gate N/P patterning
Grant 8,980,706 - Yeh , et al. March 17, 2 | 2015-03-17 |
Alignment Mark and Method of Formation
App 20150069580 - Tsai; Chen-Yu ; et al. | 2015-03-12 |
Through silicon via structure
Grant 8,952,506 - Yu , et al. February 10, 2 | 2015-02-10 |
Alignment marks in substrate having through-substrate via (TSV)
Grant 8,928,159 - Chang , et al. January 6, 2 | 2015-01-06 |
Copper bump structures having sidewall protection layers
Grant 8,922,004 - Lin , et al. December 30, 2 | 2014-12-30 |
Copper bump structures having sidewall protection layers
Grant 08922004 - | 2014-12-30 |
Method for producing a protective structure
Grant 8,900,994 - Yu , et al. December 2, 2 | 2014-12-02 |
Alignment mark and method of formation
Grant 8,896,136 - Tsai , et al. November 25, 2 | 2014-11-25 |
Through Silicon Via Structure and Method
App 20140203439 - Yu; Chen-Hua ; et al. | 2014-07-24 |
Reducing substrate warpage in semiconductor processing
Grant 8,691,706 - Yu , et al. April 8, 2 | 2014-04-08 |
Reconfigurable Guide Pin Design for Centering Wafers Having Different Sizes
App 20130334832 - Chang; Hsin ; et al. | 2013-12-19 |
Reconfigurable guide pin design for centering wafers having different sizes
Grant 8,567,837 - Chang , et al. October 29, 2 | 2013-10-29 |
Replacement gate FinFET devices and methods for forming the same
Grant 8,513,107 - Chan , et al. August 20, 2 | 2013-08-20 |
Reducing Substrate Warpage in Semiconductor Processing
App 20130183831 - Yu; Chen-Hua ; et al. | 2013-07-18 |
Through Silicon Via Structure and Method
App 20120313247 - Yu; Chen-Hua ; et al. | 2012-12-13 |
Reconfigurable Guide Pin Design for Centering Wafers Having Different Sizes
App 20120128457 - Chang; Hsin ; et al. | 2012-05-24 |
Alignment Marks in Substrate Having Through-Substrate Via (TSV)
App 20120056315 - Chang; Hsin ; et al. | 2012-03-08 |
Alignment Mark and Method of Formation
App 20120001337 - Tsai; Chen-Yu ; et al. | 2012-01-05 |
Copper Bump Structures Having Sidewall Protection Layers
App 20110304042 - Lin; Jing-Cheng ; et al. | 2011-12-15 |
Method for metal gate N/P patterning
Grant 8,048,810 - Tsai , et al. November 1, 2 | 2011-11-01 |
Method For Metal Gate N/p Patterning
App 20110189847 - Tsai; Fang Wen ; et al. | 2011-08-04 |
REPLACEMENT GATE FinFET DEVICES AND METHODS FOR FORMING THE SAME
App 20110183508 - Chan; Bor-Wen ; et al. | 2011-07-28 |
Extreme low-K dielectric film scheme for advanced interconnects
Grant RE42,514 - Tsai , et al. July 5, 2 | 2011-07-05 |
High selectivity etching process for metal gate N/P patterning
Grant 7,732,344 - Tsai , et al. June 8, 2 | 2010-06-08 |
Double Treatment On Hard Mask For Gate N/p Patterning
App 20100068875 - Yeh; Matt ; et al. | 2010-03-18 |
Extreme low-k dielectric film scheme for advanced interconnect
Grant 7,626,245 - Tsai , et al. December 1, 2 | 2009-12-01 |
Extreme Low-k Dielectric Film Scheme For Advanced Interconnects
App 20090166817 - Tsai; Fang-Wen ; et al. | 2009-07-02 |
Method for forming dielectric film to improve adhesion of low-k film
Grant 7,465,676 - Tsai , et al. December 16, 2 | 2008-12-16 |
Peeling-free porous capping material
App 20080188074 - Chen; I-I ; et al. | 2008-08-07 |
Initiation layer for reducing stress transition due to curing
App 20080116578 - Wang; Kuan-Chen ; et al. | 2008-05-22 |
Method for forming dielectric film to improve adhesion of low-k film
App 20070249159 - Tsai; Fang Wen ; et al. | 2007-10-25 |
Solution for FSG induced metal corrosion & metal peeling defects with extra bias liner and smooth RF bias ramp up
Grant 6,953,608 - Leu , et al. October 11, 2 | 2005-10-11 |
Solution for FSG induced metal corrosion & metal peeling defects with extra bias liner and smooth RF bias ramp up
App 20040213921 - Leu, Pong-Hsiung ; et al. | 2004-10-28 |
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