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Patent applications and USPTO patent grants for Tsai; Chun-Nan.The latest application filed is for "method for verifying clock signal frequency of computer sound interface".
Patent | Date |
---|---|
PCI bus cycle single-step interruption debug card Grant 6,915,458 - Tsai , et al. July 5, 2 | 2005-07-05 |
Method for verifying clock signal frequency of computer sound interface that involves checking whether count value of counter is within tolerable count range Grant 6,898,723 - Tsai May 24, 2 | 2005-05-24 |
Single step debug card using the PCI interface Grant 6,751,754 - Tsai , et al. June 15, 2 | 2004-06-15 |
Method for verifying clock signal frequency of computer sound interface App 20030188053 - Tsai, Chun-Nan | 2003-10-02 |
PCI bus cycle single-step interruption debug card App 20010052115 - Tsai, Chun-Nan ;   et al. | 2001-12-13 |
Single step debug card using the PCI interface App 20010027543 - Tsai, Chun-Nan ;   et al. | 2001-10-04 |
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