Tsai; Chao-Tzung
Patent Applications and Registrations
Patent applications and USPTO patent grants for Tsai; Chao-Tzung.The latest application filed is for "semiconductor manufacturing apparatus".
- Tsai; Chao-Tzung - Taichung TW
- TSAI; CHAO-TZUNG - TAICHUNG CITY TW
- Tsai; Chao-Tzung - Hsinchu TW
- Tsai; Chao-Tzung - Hsin-Chu TW
- Tsai; Chao-Tzung - Hsinchu City TW
| Patent | Date |
|---|---|
| Semiconductor manufacturing apparatus Grant 11,183,405 - Tsai , et al. November 23, 2 | 2021-11-23 |
| Semiconductor Manufacturing Apparatus App 20190244841 - TSAI; CHAO-TZUNG ; et al. | 2019-08-08 |
| Semiconductor manufacturing apparatus Grant 10,269,599 - Tsai , et al. | 2019-04-23 |
| Apparatus And Method For Processing Semiconductor Wafers App 20160035563 - LIN; TZU-KEN ; et al. | 2016-02-04 |
| Semiconductor Manufacturing Apparatus App 20150371882 - TSAI; CHAO-TZUNG ; et al. | 2015-12-24 |
| Retrograde trench isolation structures Grant 7,339,253 - Tsai , et al. March 4, 2 | 2008-03-04 |
| In-situ critical dimension measurement Grant 7,301,645 - Wang , et al. November 27, 2 | 2007-11-27 |
| In-situ critical dimension measrument App 20060046323 - Wang; Shiang-Bau ; et al. | 2006-03-02 |
| Retrograde trench isolation structures App 20060033179 - Tsai; Chao-Tzung ; et al. | 2006-02-16 |
| Method to reduce photoresist mask line dimensions Grant 6,962,878 - Su , et al. November 8, 2 | 2005-11-08 |
| Method to control critical dimension of a hard masked pattern Grant 6,878,646 - Tsai , et al. April 12, 2 | 2005-04-12 |
| Method to reduce photoresist mask line dimensions App 20040209480 - Su, Yih-Chen ; et al. | 2004-10-21 |
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