Truhitte; Darrell D.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Truhitte; Darrell D..The latest application filed is for "leadless semiconductor packages, leadframes therefor, and methods of making".

Company Profile

13.16.15

Truhitte; Darrell D. - Phoenix AZ

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Methods of forming leadless semiconductor packages with plated leadframes and wettable flanks Grant 11,145,581 - Truhitte , et al. October 12, 2	2021-10-12
Leadless Semiconductor Packages, Leadframes Therefor, And Methods Of Making App 20200365494 - TRUHITTE; Darrell D. ; et al.	2020-11-19
Wafer level flat no-lead semiconductor packages and methods of manufacture Grant 10,770,332 - Truhitte , et al. Sep	2020-09-08
Wafer level flat no-lead semiconductor packages and methods of manufacture Grant 10,770,333 - Truhitte , et al. Sep	2020-09-08
Leadless semiconductor packages, leadframes therefor, and methods of making Grant 10,756,006 - Truhitte , et al. A	2020-08-25
Wafer level flat no-lead semiconductor packages and methods of manufacture Grant 10,707,111 - Truhitte , et al.	2020-07-07
Damaging components with defective electrical couplings Grant 10,529,632 - Truhitte , et al. J	2020-01-07
Semiconductor Package With Integrated Heat Sink App 20190393127 - TRUHITTE; Darrell D.	2019-12-26
Carrier tape with standoff units Grant 10,399,756 - Truhitte Sep	2019-09-03
Wafer Level Flat No-lead Semiconductor Packages And Methods Of Manufacture App 20190198376 - TRUHITTE; Darrell D. ; et al.	2019-06-27
Wafer Level Flat No-lead Semiconductor Packages And Methods Of Manufacture App 20190198375 - TRUHITTE; Darrell D. ; et al.	2019-06-27
Wafer Level Flat No-lead Semiconductor Packages And Methods Of Manufacture App 20190198374 - TRUHITTE; Darrell D. ; et al.	2019-06-27
Leadless Semiconductor Packages, Leadframes Therefor, And Methods Of Making App 20190122967 - TRUHITTE; Darrell D. ; et al.	2019-04-25
Wafer level flat no-lead semiconductor packages and methods of manufacture Grant 10,269,609 - Truhitte , et al.	2019-04-23
Methods Of Forming Leadless Semiconductor Packages With Plated Leadframes And Wettable Flanks App 20190088579 - TRUHITTE; Darrell D. ; et al.	2019-03-21
Leadless semiconductor packages, leadframes therefor, and methods of making Grant 10,199,311 - Truhitte , et al. Fe	2019-02-05
Damaging Components With Defective Electrical Couplings App 20190013249 - TRUHITTE; Darrell D. ; et al.	2019-01-10
Carrier Tape With Standoff Units App 20190002173 - TRUHITTE; Darrell D.	2019-01-03
Methods of forming leadless semiconductor packages with plated leadframes and wettable flanks Grant 10,163,766 - Truhitte , et al. Dec	2018-12-25
Damaging components with defective electrical couplings Grant 10,103,072 - Truhitte , et al. October 16, 2	2018-10-16
Carrier tape with standoff units Grant 10,093,468 - Truhitte October 9, 2	2018-10-09
Wafer Level Flat No-lead Semiconductor Packages And Methods Of Manufacture App 20180174881 - TRUHITTE; Darrell D. ; et al.	2018-06-21
Methods Of Forming Leadless Semiconductor Packages With Plated Leadframes And Wettable Flanks App 20180145013 - TRUHITTE; Darrell D. ; et al.	2018-05-24
Damaging Components With Defective Electrical Couplings App 20180053696 - TRUHITTE; Darrell D. ; et al.	2018-02-22
Carrier Tape With Standoff Units App 20170334625 - TRUHITTE; Darrell D.	2017-11-23
Wafer-scale marking systems and related methods Grant 9,659,876 - Truhitte May 23, 2	2017-05-23
Leadless Semiconductor Packages, Leadframes Therefor, And Methods Of Making App 20170133302 - TRUHITTE; Darrell D. ; et al.	2017-05-11
Semiconductor device package Grant D510,728 - Celaya , et al. October 18, 2	2005-10-18
Semiconductor device package Grant D504,874 - Celaya , et al. May 10, 2	2005-05-10
Method Of Forming A Leadframe For A Semiconductor Package App 20050037544 - Quah, Guan Keng ; et al.	2005-02-17
Method of forming a leadframe for a semiconductor package Grant 6,852,574 - Quah , et al. February 8, 2	2005-02-08

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.