Trivedi; Pradeep

Patent Applications and Registrations

Patent applications and USPTO patent grants for Trivedi; Pradeep.The latest application filed is for "digital on-chip duty cycle monitoring device".

Company Profile

1.42.41

Trivedi; Pradeep - Saratoga CA
Trivedi; Pradeep - Sunnyvale CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Digital on-chip duty cycle monitoring device Grant 10,241,537 - Li , et al.	2019-03-26
Digital On-chip Duty Cycle Monitoring Device App 20180364752 - Li; Huaimin ; et al.	2018-12-20
Method and apparatus to store delay locked loop biasing parameters Grant 7,251,305 - Gauthier , et al. July 31, 2	2007-07-31
Adjustment and calibration system for post-fabrication treatment of phase locked loop input receiver Grant 7,106,113 - Gauthier , et al. September 12, 2	2006-09-12
Calibration technique for phase locked loop leakage current Grant 6,998,887 - Gauthier , et al. February 14, 2	2006-02-14
Region-based voltage drop budgets for low-power design Grant 6,976,235 - Bobba , et al. December 13, 2	2005-12-13
Accuracy of timing analysis using region-based voltage drop budgets Grant 6,971,079 - Yee , et al. November 29, 2	2005-11-29
System and method for in-situ signal delay measurement for a microprocessor Grant 6,954,913 - Gauthier , et al. October 11, 2	2005-10-11
Duty cycle corrector Grant 6,882,196 - Yee , et al. April 19, 2	2005-04-19
Phase locked loop design with diode for loop filter capacitance leakage current control Grant 6,861,885 - Trivedi , et al. March 1, 2	2005-03-01
Self-correcting I/O interface driver scheme for memory interface Grant 6,859,068 - Trivedi , et al. February 22, 2	2005-02-22
Self-correcting I/o Interface Driver Scheme For Memory Interface App 20050030064 - Trivedi, Pradeep ; et al.	2005-02-10
Jitter estimation for a phase locked loop Grant 6,819,192 - Gauthier , et al. November 16, 2	2004-11-16
Increasing power supply noise rejection using linear voltage regulators in an on-chip temperature sensor Grant 6,809,557 - Gauthier , et al. October 26, 2	2004-10-26
Quantifying a difference between nodal voltages Grant 6,806,698 - Gauthier , et al. October 19, 2	2004-10-19
System and method for in-situ signal delay measurement for a microprocessor App 20040196069 - Gauthier, Claude R. ; et al.	2004-10-07
Method and apparatus for calibrating a delay locked loop charge pump current Grant 6,788,045 - Gauthier , et al. September 7, 2	2004-09-07
Post-silicon phase offset control of phase locked loop input receiver Grant 6,784,752 - Gauthier , et al. August 31, 2	2004-08-31
Transmission gate based signal transition accelerator Grant 6,784,689 - Bobba , et al. August 31, 2	2004-08-31
Phase locked loop input receiver design with delay matching feature Grant 6,778,027 - Gauthier , et al. August 17, 2	2004-08-17
Post-silicon control of an embedded temperature sensor Grant 6,775,638 - Gauthier , et al. August 10, 2	2004-08-10
Adjustment and calibration system for post-fabrication treatment of phase locked loop charge pump Grant 6,768,955 - Gauthier , et al. July 27, 2	2004-07-27
150 degree bump placement layout for an integrated circuit power grid Grant 6,762,505 - Bobba , et al. July 13, 2	2004-07-13
Method and apparatus for calibration of a post-fabrication bias voltage tuning feature for self biasing phase locked loop Grant 6,753,740 - Gauthier , et al. June 22, 2	2004-06-22
Adjustment and calibration system for post-fabrication treatment of on-chip temperature sensor Grant 6,749,335 - Gauthier , et al. June 15, 2	2004-06-15
Method for simulating power supply noise in an on-chip temperature sensor Grant 6,748,339 - Amick , et al. June 8, 2	2004-06-08
Dynamic modulation of on-chip supply voltage for low-power design Grant 6,737,844 - Trivedi , et al. May 18, 2	2004-05-18
Delay locked loop design with diode for loop filter capacitance leakage current control Grant 6,727,737 - Trivedi , et al. April 27, 2	2004-04-27
Region-based voltage drop budgets for low-power design App 20040054979 - Bobba, Sudhakar ; et al.	2004-03-18
Accuracy of timing analysis using region-based voltage drop budgets App 20040054975 - Yee, Gin ; et al.	2004-03-18
Clock detect indicator Grant 6,707,320 - Trivedi , et al. March 16, 2	2004-03-16
Method for decoupling capacitor optimization for a temperature sensor design Grant 6,704,680 - Amick , et al. March 9, 2	2004-03-09
Calibration technique for phase locked loop leakage current App 20040033793 - Gauthier, Claude R. ; et al.	2004-02-19
Method and system for estimating jitter in a delay locked loop Grant 6,691,291 - Gauthier , et al. February 10, 2	2004-02-10
Method for optimizing loop bandwidth in delay locked loops Grant 6,687,881 - Gauthier , et al. February 3, 2	2004-02-03
Phase Locked Loop Design With Diode For Loop Filter Capacitance Leakage Current Control App 20040012421 - Trivedi, Pradeep ; et al.	2004-01-22
Duty cycle corrector App 20040012428 - Yee, Gin ; et al.	2004-01-22
Delay Locked Loop Design With Diode For Loop Filter Capacitance Leakage Current Control App 20040012426 - Trivedi, Pradeep ; et al.	2004-01-22
Optimization of loop bandwidth for a phase locked loop Grant 6,671,863 - Gauthier , et al. December 30, 2	2003-12-30
Circuit for post-silicon control of delay locked loop charge pump current Grant 6,664,831 - Gauthier , et al. December 16, 2	2003-12-16
Post-silicon control of phase locked loop charge pump current Grant 6,664,828 - Gauthier , et al. December 16, 2	2003-12-16
Dynamic modulation of on-chip supply voltage for low-power design App 20030223301 - Trivedi, Pradeep ; et al.	2003-12-04
Technique for optimizing decoupling capacitance subject to leakage power constraints Grant 6,658,629 - Bobba , et al. December 2, 2	2003-12-02
Adjustment and calibration system for post-fabrication treatment of phase locked loop charge pump App 20030214333 - Gauthier, Claude R. ; et al.	2003-11-20
Method and apparatus for calibration of a post-fabrication bias voltage tuning feature for self biasing phase locked loop App 20030214362 - Gauthier, Claude R. ; et al.	2003-11-20
Method and apparatus to store delay locked loop biasing parameters App 20030215041 - Gauthier, Claude R. ; et al.	2003-11-20
Method and apparatus for calibrating a delay locked loop charge pump current App 20030214280 - Gauthier, Claude R. ; et al.	2003-11-20
Adjustment and calibration system for post-fabrication treatment of on-chip temperature sensor App 20030214998 - Gauthier, Claude ; et al.	2003-11-20
Adjustment and calibration system for post-fabrication treatment of phase locked loop input receiver App 20030215042 - Gauthier, Claude R. ; et al.	2003-11-20
Technique For Optimizing Decoupling Capacitance Subject To Leakage Power Constraints App 20030212965 - Bobba, Sudhakar ; et al.	2003-11-13
Multiple supply voltage dynamic logic Grant 6,646,473 - Trivedi , et al. November 11, 2	2003-11-11
Clock power reduction technique using multi-level voltage input clock driver Grant 6,646,472 - Trivedi , et al. November 11, 2	2003-11-11
Frequency multiplier design Grant 6,642,756 - Yee , et al. November 4, 2	2003-11-04
Post-silicon phase offset control of phase locked loop input receiver App 20030201841 - Gauthier, Claude ; et al.	2003-10-30
Post-silicon control of an embedded temperature sensor App 20030204358 - Gauthier, Claude ; et al.	2003-10-30
Circuit For Post-silicon Control Of Delay Locked Loop Charge Pump Current App 20030201809 - Gauthier, Claude ; et al.	2003-10-30
Post-silicon Control Of Phase Locked Loop Charge Pump Current App 20030201808 - Gauthier, Claude ; et al.	2003-10-30
Decoupling capacitor assignment technique with respect to leakage power Grant 6,640,331 - Trivedi , et al. October 28, 2	2003-10-28
Phase locked loop input receiver design with delay matching feature App 20030193375 - Gauthier, Claude ; et al.	2003-10-16
Sliding grid based technique for optimal on-chip decap insertion Grant 6,625,791 - Bobba , et al. September 23, 2	2003-09-23
Calibration technique for delay locked loop leakage current Grant 6,614,287 - Gauthier , et al. September 2, 2	2003-09-02
Clock grid skew reduction technique using biasable delay drivers App 20030163750 - Trivedi, Pradeep ; et al.	2003-08-28
Quantifying a difference between nodal voltages App 20030155903 - Gauthier, Claude ; et al.	2003-08-21
Increasing power supply noise rejection using linear voltage regulators in an on-chip temperature sensor App 20030155964 - Gauthier, Claude ; et al.	2003-08-21
Temperature calibration using on-chip electrical fuses App 20030158683 - Gauthier, Claude ; et al.	2003-08-21
Method for decoupling capacitor optimization for a temperature sensor design App 20030154048 - Amick, Brian ; et al.	2003-08-14
Method for optimizing decoupling capacitor design in delay locked loops App 20030154065 - Gauthier, Claude ; et al.	2003-08-14
Optimization of loop bandwidth for a phase locked loop App 20030154453 - Gauthier, Claude ; et al.	2003-08-14
Method and system for estimating jitter in a delay locked loop App 20030154454 - Gauthier, Claude ; et al.	2003-08-14
Method for optimizing loop bandwidth in delay locked loops App 20030154447 - Gauthier, Claude ; et al.	2003-08-14
Jitter estimation for a phase locked loop App 20030151464 - Gauthier, Claude ; et al.	2003-08-14
Decoupling capacitor method for a phase locked loop App 20030154064 - Gauthier, Claude ; et al.	2003-08-14
Transmission gate based signal transition accelerator App 20030146773 - Bobba, Sudhakar ; et al.	2003-08-07
Delay locked loop design with switch for loop filter capacitance leakage current control Grant 6,597,219 - Trivedi , et al. July 22, 2	2003-07-22
Programmable bias-generator for self-biasing a delay locked loop Grant 6,597,218 - Gauthier , et al. July 22, 2	2003-07-22
Decoupling Capacitor Assignment Technique With Respect To Leakage Power App 20030106033 - Trivedi, Pradeep ; et al.	2003-06-05
Clock detect indicator App 20030102899 - Trivedi, Pradeep ; et al.	2003-06-05
Current Crowding Reduction Technique For Flip Chip Package Technology App 20030098510 - Trivedi, Pradeep ; et al.	2003-05-29
150 degree bump placement layout for an integrated circuit power grid App 20030098512 - Bobba, Sudhakar ; et al.	2003-05-29
180 Degree Bump Placement Layout For An Integrated Circuit Power Grid App 20030098500 - Bobba, Sudhakar ; et al.	2003-05-29
Clock grid skew reduction using a wire tree architecture App 20030101423 - Thorp, Tyler ; et al.	2003-05-29
Lock detect indicator for a phase locked loop App 20030098720 - Trivedi, Pradeep ; et al.	2003-05-29
Noise immune transmission gate Grant 6,552,576 - Bobba , et al. April 22, 2	2003-04-22

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