loadpatents
name:-0.048435926437378
name:-0.029703855514526
name:-0.0015969276428223
Trentzsch; Martin Patent Filings

Trentzsch; Martin

Patent Applications and Registrations

Patent applications and USPTO patent grants for Trentzsch; Martin.The latest application filed is for "system and method for status-dependent controlling of a substrate ambient in microprocessing".

Company Profile
1.35.36
  • Trentzsch; Martin - Dresden DE
  • Trentzsch; Martin - Radebeul DE
  • Trentzsch; Martin - Netzschkau DE
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Ferro-FET device with buried buffer/ferroelectric layer stack
Grant 10,163,933 - Richter , et al. Dec
2018-12-25
NVM device in SOI technology and method of fabricating an according device
Grant 10,084,057 - Beyer , et al. September 25, 2
2018-09-25
System And Method For Status-dependent Controlling Of A Substrate Ambient In Microprocessing
App 20180269081 - Bayha; Boris ;   et al.
2018-09-20
Nvm Device In Soi Technology And Method Of Fabricating An According Device
App 20180053832 - Beyer; Sven ;   et al.
2018-02-22
Methods for fabricating integrated circuits with isolation regions having uniform step heights
Grant 9,508,588 - Grass , et al. November 29, 2
2016-11-29
Methods For Fabricating Integrated Circuits With Isolation Regions Having Uniform Step Heights
App 20160126132 - Grass; Carsten ;   et al.
2016-05-05
Semiconductor device with field-inducing structure
Grant 9,236,482 - Goldbach , et al. January 12, 2
2016-01-12
Semiconductor Device With Field-inducing Structure
App 20150243789 - Goldbach; Matthias ;   et al.
2015-08-27
Transistor Device With Strained Layer
App 20150179740 - Triyoso; Dina H. ;   et al.
2015-06-25
FinFET method comprising high-K dielectric
Grant 9,064,900 - Goldbach , et al. June 23, 2
2015-06-23
Method of forming a material layer in a semiconductor structure
Grant 8,993,459 - Grass , et al. March 31, 2
2015-03-31
Semiconductor Device Structure And Method For Forming A Semiconductor Device Structure
App 20150008536 - Goldbach; Matthias ;   et al.
2015-01-08
Metal gate structure for semiconductor devices
Grant 8,872,285 - Scheiper , et al. October 28, 2
2014-10-28
Method For Forming A Gate Electrode Of A Semiconductor Device, Gate Electrode Structure For A Semiconductor Device And According Semiconductor Device Structure
App 20140264626 - Yan; Ran ;   et al.
2014-09-18
Metal Gate Structure For Semiconductor Devices
App 20140246735 - Scheiper; Thilo ;   et al.
2014-09-04
Semiconductor resistor including a dielectric layer including a species creating fixed charges and method for the formation thereof
Grant 8,823,138 - Goldbach , et al. September 2, 2
2014-09-02
CET and gate current leakage reduction in high-k metal gate electrode structures by heat treatment after diffusion layer removal
Grant 8,735,240 - Kelwing , et al. May 27, 2
2014-05-27
Adjusting of a non-silicon fraction in a semiconductor alloy during transistor fabrication by an intermediate oxidation process
Grant 8,735,253 - Kronholz , et al. May 27, 2
2014-05-27
Method Of Forming A Material Layer In A Semiconductor Structure
App 20140065808 - Grass; Carsten ;   et al.
2014-03-06
Passivating point defects in high-K gate dielectric layers during gate stack formation
Grant 8,658,490 - Erben , et al. February 25, 2
2014-02-25
Enhancing interface characteristics between a channel semiconductor alloy and a gate dielectric by an oxidation process
Grant 8,609,482 - Kronholz , et al. December 17, 2
2013-12-17
Cet And Gate Current Leakage Reduction In High-k Metal Gate Electrode Structures By Heat Treatment After Diffusion Layer Removal
App 20130288435 - Kelwing; Torben ;   et al.
2013-10-31
Multiple High-k Metal Gate Stacks In A Field Effect Transistor
App 20130277766 - Kelwing; Torben ;   et al.
2013-10-24
Enhanced Device Reliability Of A Semiconductor Device By Providing Superior Process Conditions In High-k Film Growth
App 20130280873 - Erben; Elke ;   et al.
2013-10-24
Passivating Point Defects In High-k Gate Dielectric Layers During Gate Stack Formation
App 20130267086 - Erben; Elke ;   et al.
2013-10-10
Adjusting threshold voltage for sophisticated transistors by diffusing a gate dielectric cap layer material prior to gate dielectric stabilization
Grant 8,525,289 - Carter , et al. September 3, 2
2013-09-03
Enhancing uniformity of a channel semiconductor alloy by forming STI structures after the growth process
Grant 8,486,786 - Kronholz , et al. July 16, 2
2013-07-16
Patterning of Sensitive Metal-Containing Layers With Superior Mask Material Adhesion by Providing a Modified Surface Layer
App 20130126984 - Reimer; Berthold ;   et al.
2013-05-23
Uniform high-k metal gate stacks by adjusting threshold voltage for sophisticated transistors by diffusing a metal species prior to gate patterning
Grant 8,445,344 - Carter , et al. May 21, 2
2013-05-21
Maintaining integrity of a high-K gate stack by an offset spacer used to determine an offset of a strain-inducing semiconductor alloy
Grant 8,378,432 - Carter , et al. February 19, 2
2013-02-19
Work function adjustment in high-k gate stacks including gate dielectrics of different thickness
Grant 8,349,695 - Scheiper , et al. January 8, 2
2013-01-08
Enhancing Interface Characteristics Between A Channel Semiconductor Alloy And A Gate Dielectric By An Oxidation Process
App 20120282760 - Kronholz; Stephan ;   et al.
2012-11-08
Semiconductor device comprising a metal gate stack of reduced height and method of forming the same
Grant 8,293,610 - Beyer , et al. October 23, 2
2012-10-23
Enhancing interface characteristics between a channel semiconductor alloy and a gate dielectric by an oxidation process
Grant 8,247,282 - Kronholz , et al. August 21, 2
2012-08-21
Adjusting Threshold Voltage For Sophisticated Transistors By Diffusing A Gate Dielectric Cap Layer Material Prior To Gate Dielectric Stabilization
App 20120193727 - Carter; Richard ;   et al.
2012-08-02
Adjusting threshold voltage for sophisticated transistors by diffusing a gate dielectric cap layer material prior to gate dielectric stabilization
Grant 8,198,192 - Carter , et al. June 12, 2
2012-06-12
In situ monitoring of metal contamination during microstructure processing
Grant 8,158,065 - Trentzsch , et al. April 17, 2
2012-04-17
Reducing the creation of charge traps at gate dielectrics in MOS transistors by performing a hydrogen treatment
Grant 8,119,461 - Trentzsch , et al. February 21, 2
2012-02-21
Method of enhancing lithography capabilities during gate formation in semiconductors having a pronounced surface topography
Grant 8,101,512 - Gerhardt , et al. January 24, 2
2012-01-24
Method of forming CMOS device having gate insulation layers of different type and thickness
Grant 8,021,942 - Wei , et al. September 20, 2
2011-09-20
Gate dielectrics of different thickness in PMOS and NMOS transistors
Grant 7,994,037 - Trentzsch , et al. August 9, 2
2011-08-09
Enhancing Interface Characteristics Between A Channel Semiconductor Alloy And A Gate Dielectric By An Oxidation Process
App 20110129970 - Kronholz; Stephan ;   et al.
2011-06-02
Work Function Adjustment In High-k Gate Stacks Including Gate Dielectrics Of Different Thickness
App 20110049642 - Scheiper; Thilo ;   et al.
2011-03-03
Reducing The Creation Of Charge Traps At Gate Dielectrics In Mos Transistors By Performing A Hydrogen Treatment
App 20110045665 - Trentzsch; Martin ;   et al.
2011-02-24
Uniform High-k Metal Gate Stacks By Adjusting Threshold Voltage For Sophisticated Transistors By Diffusing A Metal Species Prior To Gate Patterning
App 20100327373 - Carter; Richard ;   et al.
2010-12-30
Enhancing Uniformity Of A Channel Semiconductor Alloy By Forming Sti Structures After The Growth Process
App 20100289090 - Kronholz; Stephan ;   et al.
2010-11-18
Adjusting Threshold Voltage For Sophisticated Transistors By Diffusing A Gate Dielectric Cap Layer Material Prior To Gate Dielectric Stabilization
App 20100289089 - Carter; Richard ;   et al.
2010-11-18
Maintaining Integrity Of A High-k Gate Stack By An Offset Spacer Used To Determine An Offset Of A Strain-inducing Semiconductor Alloy
App 20100244155 - Carter; Richard ;   et al.
2010-09-30
Adjusting Of A Non-silicon Fraction In A Semiconductor Alloy During Transistor Fabrication By An Intermediate Oxidation Process
App 20100221883 - Kronholz; Stephan ;   et al.
2010-09-02
Technique for locally adapting transistor characteristics by using advanced laser/flash anneal techniques
Grant 7,745,334 - Press , et al. June 29, 2
2010-06-29
In Situ Monitoring Of Metal Contamination During Microstructure Processing
App 20100077839 - Trentzsch; Martin ;   et al.
2010-04-01
Gate Dielectrics Of Different Thickness In Pmos And Nmos Transistors
App 20100025770 - Trentzsch; Martin ;   et al.
2010-02-04
Semiconductor Device Comprising A Metal Gate Stack Of Reduced Height And Method Of Forming The Same
App 20090218639 - Beyer; Sven ;   et al.
2009-09-03
Reducing The Creation Of Charge Traps At Gate Dielectrics In Mos Transistors By Performing A Hydrogen Treatment
App 20090170339 - Trentzsch; Martin ;   et al.
2009-07-02
Cmos Device Having Gate Insulation Layers Of Different Type And Thickness And A Method Of Forming The Same
App 20090057769 - Wei; Andy ;   et al.
2009-03-05
Technique For Locally Adapting Transistor Characteristics By Using Advanced Laser/flash Anneal Techniques
App 20080081471 - Press; Patrick ;   et al.
2008-04-03
Method Of Enhancing Lithography Capabilities During Gate Formation In Semiconductors Having A Pronounced Surface Topography
App 20080026552 - Gerhardt; Martin ;   et al.
2008-01-31

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.

© 2024 USPTO.report | Privacy Policy | Resources | RSS Feed of Trademarks | Trademark Filings Twitter Feed