loadpatents
name:-0.0091140270233154
name:-0.012449979782104
name:-0.00050592422485352
Tremaine; Robert Brett Patent Filings

Tremaine; Robert Brett

Patent Applications and Registrations

Patent applications and USPTO patent grants for Tremaine; Robert Brett.The latest application filed is for "assist thread for injecting cache memory in a microprocessor".

Company Profile
0.17.10
  • Tremaine; Robert Brett - Stormville NY US
  • Tremaine; Robert Brett - Poughkeepsie NY US
  • Tremaine; Robert Brett - Strormville NY
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Assist thread for injecting cache memory in a microprocessor
Grant 8,949,837 - Bohrer , et al. February 3, 2
2015-02-03
Verification of soft error resilience
Grant 8,555,234 - Tremaine , et al. October 8, 2
2013-10-08
Method and apparatus for software-assisted data cache and prefetch control
Grant 8,490,065 - Archambault , et al. July 16, 2
2013-07-16
System to determine fault tolerance in an integrated circuit and associated methods
Grant 8,433,950 - Check , et al. April 30, 2
2013-04-30
Assist Thread For Injecting Cache Memory In A Microprocessor
App 20120198459 - Bohrer; Patrick Joseph ;   et al.
2012-08-02
Assist thread for injecting cache memory in a microprocessor
Grant 8,230,422 - Bohrer , et al. July 24, 2
2012-07-24
Systems and methods for reducing latency for accessing compressed memory using stratified compressed memory architectures and organization
Grant 7,962,700 - Franaszek , et al. June 14, 2
2011-06-14
Methods and arrangements to manage on-chip memory to reduce memory latency
Grant 7,934,061 - da Silva , et al. April 26, 2
2011-04-26
Verification of Soft Error Resilience
App 20110055777 - Tremaine; Robert Brett ;   et al.
2011-03-03
System To Determine Fault Tolerance In An Integrated Circuit And Associated Methods
App 20100241900 - Check; Mark A. ;   et al.
2010-09-23
Computer compressed memory system and method for storing and retrieving data in a processing system
Grant 7,610,541 - Tremaine , et al. October 27, 2
2009-10-27
Methods and Arrangements to Manage On-Chip Memory to Reduce Memory Latency
App 20080263284 - da Silva; Dilma Menezes ;   et al.
2008-10-23
Methods and arrangements to manage on-chip memory to reduce memory latency
Grant 7,437,517 - da Silva , et al. October 14, 2
2008-10-14
Systems and methods for reducing latency for accessing compressed memory using stratified compressed memory architectures and organization
App 20080055323 - Franaszek; Peter Anthony ;   et al.
2008-03-06
Low cost and high RAS mirrored memory
Grant 7,287,138 - Bland , et al. October 23, 2
2007-10-23
Computer compressed memory system and method for storing and retrieving data in a processing system
App 20070226428 - Tremaine; Robert Brett ;   et al.
2007-09-27
Method and apparatus for software-assisted data cache and prefetch control
App 20070088915 - Archambault; Roch ;   et al.
2007-04-19
Assist thread for injecting cache memory in a microprocessor
App 20060155963 - Bohrer; Patrick Joseph ;   et al.
2006-07-13
Methods and arrangements to manage on-chip memory to reduce memory latency
App 20060155886 - da Silva; Dilma Menezes ;   et al.
2006-07-13
Low cost and high ras mirrored memory
App 20040230767 - Bland, Patrick Maurice ;   et al.
2004-11-18
Low cost and high RAS mirrored memory
Grant 6,766,429 - Bland , et al. July 20, 2
2004-07-20
System and method in a data processing system for extracting data from a protected region of memory
Grant 6,658,548 - Kochar , et al. December 2, 2
2003-12-02
Memory system for permitting simultaneous processor access to a cache line and sub-cache line sectors fill and writeback to a system memory
Grant 6,339,813 - Smith, III , et al. January 15, 2
2002-01-15

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